2 件のレコードが見つかりました。
A Gate Programmable van der Waals Metal‐Ferroelectric‐Semiconductor Vertical Heterojunction Memory
- ジャーナル論文
- 著者
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;Wanying Li (author) (この著者で検索);Yimeng Guo (author) (この著者で検索);Zhaoping Luo (author) (この著者で検索);Shuhao Wu (author) (この著者で検索);Bo Han (author) (この著者で検索);Weijin Hu (author) (この著者で検索);Lu You (author) (この著者で検索)Kenji Watanabe (author) (この著者で検索)National Institute for Materials Science
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Takashi Taniguchi (author) (この著者で検索)National Institute for Materials Science
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;Thomas Alava (author) (この著者で検索);Jiezhi Chen (author) (この著者で検索);Peng Gao (author) (この著者で検索);Xiuyan Li (author) (この著者で検索);Zhongming Wei (author) (この著者で検索);Lin‐Wang Wang (author) (この著者で検索);Yue‐Yang Liu (author) (この著者で検索);Chengxin Zhao (author) (この著者で検索);Xuepeng Zhan (author) (この著者で検索);Zheng Vitto Han (author) (この著者で検索)Hanwen Wang (author) (この著者で検索) - キーワード
- Ferroelectricity, van der Waals memories, gate-tunable
- 刊行年月日
- 2022-12-18
- 更新時刻
- 2025-02-14 12:31:45 +0900
Van der Waals polarity-engineered 3D integration of 2D complementary logic
- ジャーナル論文
- 著者
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;Yimeng Guo (author) (この著者で検索);Jiangxu Li (author) (この著者で検索);Xuepeng Zhan (author) (この著者で検索);Chunwen Wang (author) (この著者で検索);Min Li (author) (この著者で検索);Biao Zhang (author) (この著者で検索);Zirui Wang (author) (この著者で検索);Yueyang Liu (author) (この著者で検索);Kaining Yang (author) (この著者で検索);Hai Wang (author) (この著者で検索);Wanying Li (author) (この著者で検索);Pingfan Gu (author) (この著者で検索);Zhaoping Luo (author) (この著者で検索);Yingjia Liu (author) (この著者で検索);Peitao Liu (author) (この著者で検索);Bo Chen (author) (この著者で検索)Kenji Watanabe (author) (この著者で検索)National Institute for Materials Science
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Takashi Taniguchi (author) (この著者で検索)National Institute for Materials Science
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;Xing-Qiu Chen (author) (この著者で検索);Chengbing Qin (author) (この著者で検索);Jiezhi Chen (author) (この著者で検索);Dongming Sun (author) (この著者で検索);Jing Zhang (author) (この著者で検索);Runsheng Wang (author) (この著者で検索);Jianpeng Liu (author) (この著者で検索);Yu Ye (author) (この著者で検索);Xiuyan Li (author) (この著者で検索);Yanglong Hou (author) (この著者で検索);Wu Zhou (author) (この著者で検索);Hanwen Wang (author) (この著者で検索)Zheng Han (author) (この著者で検索)
- キーワード
- Polarity Engineering of 2D Semiconductors, Vertically Integrated Logic Circuits, van der Waals Interfacial Coupling
- 刊行年月日
- 2024-06-13
- 更新時刻
- 2025-08-02 08:30:31 +0900