Download all files (6.03 MB)

Collection

Citation

Description:

In-memory computing may make it possible to realize non-von Neumann computing because the logic circuits are unified in the memory units. We investigated two types of in-memory logic operation, namely two-input logic circuits and multifunctional artificial synapses. These were realized in a dual-gate antiambipolar transistor (AAT) with an ReS2/WSe2 heterojunction, in which polystyrene with a zinc phthalocyanine core (ZnPc-PS4) was incorporated as a memory layer. First, we achieved electrically reconfigurable two-input logic circuits. Versatile logic circuits such as AND, OR, NAND, NOR, and XOR circuits were demonstrated by taking advantage of the Λ-shaped transfer curve of the dual-gate AAT. Importantly, the nonvolatile memory function provided the electrical switching of the individual circuits between AND/OR, NAND/NOR, and XOR/NAND circuits with constant input signals. Second, the memory effect was applied to multifunctional artificial synapses. These findings provide hints that may lead to the realization of new in-memory computing architectures beyond the current von Neumann computers.

Rights:

• In Copyright
  This document is the Accepted Manuscript version of a Published Work that appeared in final form in ACS Applied Materials & Interfaces, copyright © 2024 American Chemical Society after peer review and technical editing by the publisher. To access the final edited and published work see https://doi.org/10.1021/acsami.4c06116

Keyword: 2D materials, antiambipolar transistor, in-memory logic, neuromorphic device, nano-floating gate, non-von Neumann computing

Date published: 2024-07-03

Publisher: American Chemical Society

Journal:

• ACS Applied Materials & Interfaces (ISSN: 19448252) vol. 16 issue. 26

Funding:

Manuscript type: Author's version (Accepted manuscript)

MDR DOI: https://doi.org/10.48505/nims.4603

First published URL: http://doi.org/10.1021/acsami.4c06116

Related item:

Other identifier(s):

Contact agent:

Updated at: 2025-06-24 08:30:41 +0900

Published on MDR: 2025-06-24 08:20:45 +0900