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MoS2 is one of the transition metal dichalcogenides that has been extensively studied as a next-generation semiconductor material due to its high carrier mobility in the monolayer limit. However, the atomically thin nature of MoS2 poses challenges for capacitance characteristics measurements by metal-oxide-semiconductor (MOS) capacitors, leading to limited research on the characteristics of their interfaces. In this study, we fabricated MOS capacitors with different device areas using a monolayer MoS2 synthesized by chemical vapor deposition and a high-k dielectric, Al2O3 insulator deposited by atomic layer deposition and performed the capacitance measurement. We found that increasing the area of the devices led to more significant frequency-dispersion due to increased channel resistance within the MoS2. Importantly, we propose for the first time the use of the ring-shaped capacitor conductance method to extract interface trap densities on the order of 1012 eV-1 cm-2 from devices with different areas, indicating that under the present measurement conditions, series and channel resistances do not significantly affect the extraction of interface trap density. Our results provide valuable insights into the interface properties of MOS structures incorporating monolayer MoS2, which are essential for advancing the development of two-dimensional semiconductor devices.

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Keyword: MoS2 MOS Capacitors

Date published: 2026-07-03

Publisher: Institute of Electrical and Electronics Engineers (IEEE)

Journal:

• IEEE Electron Device Letters (ISSN: 07413106) vol. 47 issue. 9 p. 1720-1723

Funding:

Manuscript type: Author's version (Accepted manuscript)

MDR DOI: https://doi.org/10.48505/nims.8672

First published URL: https://doi.org/10.1109/led.2026.3708092

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Updated at: 2026-10-21 08:30:20 +0900

Published on MDR: 2026-10-20 18:29:39 +0900