Article Effect of capping on the Dirac semimetal Cd3As2 on Si grown via molecular beam epitaxy

Wei-Chen Lin ; Chiashain Chuang ; Chun-Wei Kuo ; Meng-Ting Wu ; Jie-Ying Lee ; Hsin-Hsuan Lee ; Cheng-Hsueh Yang ; Ji-Wei Ci ; Tian-Shun Xie ; Kenji Watanabe SAMURAI ORCID (National Institute for Materials Science) ; Takashi Taniguchi SAMURAI ORCID (National Institute for Materials Science) ; Nobuyuki Aoki ; Jyh-Shyang Wang ; Chi-Te Liang

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Wei-Chen Lin, Chiashain Chuang, Chun-Wei Kuo, Meng-Ting Wu, Jie-Ying Lee, Hsin-Hsuan Lee, Cheng-Hsueh Yang, Ji-Wei Ci, Tian-Shun Xie, Kenji Watanabe, Takashi Taniguchi, Nobuyuki Aoki, Jyh-Shyang Wang, Chi-Te Liang. Effect of capping on the Dirac semimetal Cd3As2 on Si grown via molecular beam epitaxy. Nanotechnology. 2025, 36 (16), 165001. https://doi.org/10.1088/1361-6528/adbb74

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(abstract)

Tunnel field-effect transistor (TFET) is emerging as a promising alternative to overcome the thermionic limit of 60 mV/dec in subthreshold swing (SS) inherent to Metal-Oxide-Semiconductor Field- Effect Transistor (MOSFET) through the band-to-band tunneling (BTBT) mechanism. TFET offers significant potential for applications in future industries, such as low-power sensors and wearable devices, where extreme energy efficiency is critical. Notably, due to the characteristic of the BTBT mechanism, TFET can maintain stable SS performance even at high temperature, enabling low-power operation under such condition. Although numerous theoretical predictions and simulations support this capability, experimental validation has not yet to be demonstrated. As electric and autonomous vehicles advance, the demand for automotive semiconductors has increased, highlighting the importance of transistor technology that remains stable at high temperatures and consumes less power. Here, we report high temperature TFETs showing SS < 60 mV/dec through vertical heterojunction of 2D semiconductors. n-TFET and p-TFET were successfully implemented via BP-MoS2 and WSe2-ReS2 heterojunction, respectively. Both TFETs reached SSmin under 50 mV/dec at room temperature and maintained SS1dec_avg under 60 mV/dec up to 400 K. These findings pave the way for low-power circuits capable of operation in harsh environments.

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Keyword: Dirac semimetal
, Cd3As2
, molecular beam epitaxy (MBE)


Date published: 2025-04-21

Publisher: IOP Publishing

Journal:

  • Nanotechnology (ISSN: 09574484) vol. 36 issue. 16 165001

Funding:

  • Chung Yuan Christian University
  • Ministry of Science and Technology
  • KAKENHI 19H05790
  • JSPS
  • Chiba University
  • Higher Education Sprout Project
  • National Science and Technology Council (NSTC), Taiwan NSTC 110-2112-M-033-009-MY3

Manuscript type: Publisher's version (Version of record)

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First published URL: https://doi.org/10.1088/1361-6528/adbb74

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Updated at: 2026-02-17 08:30:37 +0900

Published on MDR: 2026-02-16 18:00:53 +0900

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