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Bo He, Gang He, Shanshan Jiang, [Jiangwei Liu](https://orcid.org/0000-0003-2580-7401), Elvira Fortunato, Rodrigo Martins

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[Electrospun Stacked Dual‐Channel Transistors with High Electron Mobility Using a Planar Heterojunction Architecture](https://mdr.nims.go.jp/datasets/e08106c4-9865-47d1-a930-7c0fe1a96a07)

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Electrospun Stacked Dual‐Channel Transistors with High Electron Mobility Using a Planar Heterojunction Architecturewww.advelectronicmat.de2201007  (1 of 11) © 2022 The Authors. Advanced Electronic Materials published by Wiley-VCH GmbHElectrospun Stacked Dual-Channel Transistors with High Electron Mobility Using a Planar Heterojunction ArchitectureBo He, Gang He,* Shanshan Jiang, Jiangwei Liu, Elvira Fortunato, and Rodrigo MartinsDOI: 10.1002/aelm.2022010071. IntroductionIn the past decades, metal oxide semi-conductors (MOS) have been perceived as competitive channel components in thin-film transistors (TFTs) for next-generation displays owing to their excel-lent carrier mobility, high transparency, low manufacturing cost and good envi-ronmental stability.[1–4] Among these MOS candidates, 1D oxide semiconductor nano-structures, such as nanotube, nanowires and nanofiber networks (NFNs), have been widely explored as the fundamental building blocks for various technological applications owing to the size-confined physical properties and solving scaling limiting problem.[5–9] Up to now, consid-erable novel synthesis techniques have been devoted to the development of 1D nanomaterials, including chemical vapor deposition (CVD),[10] and solution-based process.[11] However, despite this progress, these fabrication schemes still suffer from different process-related disadvantages. CVD-based technique is incompatible with current large-scale manufacturing platform due to high fabricating cost and complicated preparation process. Although solution-derived thin-film electronics could partially satisfy the requirements for practical devices applications, it is still chal-lenged by low yield and low yield and poor compatibility, lim-iting their practical utilizations. To realize thin-film electronics with large-scale and low-cost, further technological innovations in achieving thin-film are highly desired.Among the different strategies for producing 1D building blocks, electrospinning is a straightforward, versatile and low cost route to produce continuous nanofibers with high spe-cific surface area and uniform diameters.[12] Moreover, the electrospinning-based method usually exhibits some advan-tages over others, such as easy operation, high throughput, low fabrication cost and convenient assembly into films, which benefits the mass production and consumption of functional electronics. Recently, much progress in 1D MOS nanofibers has been achieved, especially in the emerging field of low-cost and disposable electronics. Among the MOS-based nanofibers developed to date, electrospun In2O3 and ZnO NFNs have been regarded as the representative examples of high-performance metal-oxide nanomaterials due to their high electron mobility and large bandgap for excellent transmittance in the visible region.[13,14] Currently, NFN-based TFTs with electron mobilities Thin-film transistors based on metal oxide semiconductors have become a mainstream technology for application in driving low-cost backplanes of active matrix liquid crystal displays. Although significant progress has been made in traditional marketable devices based on physical vapor deposition derived metal oxides, it has still been hindered by low yield and poor compat-ibility. Fortunately, developing solution-based 1D nanofiber networks to act as the fundamental building blocks for transistor has proven to be a simpler, higher-throughput approach. However, oxide transistors based on such princesses suffer from degraded carrier mobility and operational instability, preventing the ability of such devices from replacing present polycrystalline Si technologies. Herein, it is shown that double channel heterojunction transis-tors with high electron mobility (>40 cm2 V−1 s−1) and operational stability can be achieved from electrospun double channels composed of In2O3 and ZnO layers. Adjusting the stacking order and the stacking density of In2O3 and ZnO layers can effectively optimize the interface electron trap, leading to the formation of 2D electron gas and the reduction of stress-induced instability. These findings further elucidate the significant advance of electrospinning-derived double channel heterojunction transistors toward practical applica-tions for future low-cost and high-performance electronics.B. He, G. HeSchool of Materials Science and EngineeringAnhui UniversityHefei 230601, P. R. ChinaE-mail: hegang@ahu.edu.cnS. JiangSchool of Integration CircuitsAnhui UniversityHefei 230601, P. R. ChinaJ. LiuResearch Center for Functional MaterialsNational Institute for Materials Science (NIMS)Ibaraki 305-0044, JapanE. Fortunato, R. MartinsDepartment of Materials Science/CENIMAT-I3N, Faculty of Sciences and TechnologyNew University of Lisbon and CEMOP-UNINOVA Campus de CaparicaCaparica 2829-516, PortugalThe ORCID identification number(s) for the author(s) of this article can be found under https://doi.org/10.1002/aelm.202201007.Research Article© 2022 The Authors. Advanced Electronic Materials published by Wiley-VCH GmbH. This is an open access article under the terms of the Creative Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited.Adv. Electron. Mater. 2023, 9, 2201007 2199160x, 2023, 2, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/aelm.202201007 by Cochrane Japan, Wiley Online Library on [13/02/2023]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensehttp://crossmark.crossref.org/dialog/?doi=10.1002%2Faelm.202201007&domain=pdf&date_stamp=2022-12-07www.advancedsciencenews.comwww.advelectronicmat.de2201007  (2 of 11) © 2022 The Authors. Advanced Electronic Materials published by Wiley-VCH GmbHin the range of 25 to 45 cm2 V−1 s−1 have been achieved, and dem-onstrated the great potential to meet all the stringent require-ments in large-area, low-cost, and high-performance integrated  circuits.[15–18] However, despite this potential, TFTs based on electrospun NFNs still suffer from operational instability and degraded carrier mobility, which can be attributed to charge trapping due to the non-stoichiometric nature and the inherent surface roughness of the electrospinning-grown nanofibers. All these reported works have indicated that electrical performance of the electrospun oxide NFN TFTs has to be further improved for the practical deployment.Recently, a successful strategy for manufacturing high-per-formance oxide TFTs is based on the use of low-dimensional heterojunction (HJ) channels.[19,20] Among these HJ devices, conduction-band-offset- driven electron transfer and confine-ment occur at the heterointerface in a process similar to that observed in conventional AlGaAs/GaAs high electron mobility transistors (HEMTs).[22–25] In these devices, the formation of 2D electron gas (2DEG) near the heterointerface will lead to the reduced ionized impurity scattering and the increased carrier mobilities, exceeding those made of single oxide layer chan-nels, which can be attributed to the transition of conduction mechanism from a trap-limited process to a percolation-limited process. To date, 2DEG HJ TFTs based on ZnO/ZnMgO and In2O3/ZnO heterojunctions are being investigated.[20–22,26–29] For instance, sputtering-derived MgZnO/ZnO HJ TFTs exhibit a higher mobility (≈84.2  cm2  V−1  s−1) than ZnO-only TFTs (≈1.5 cm2 V−1 s−1).[30] Anthopoulos[22] has observed a significant increase in the electron mobility and a dramatic change in the charge transport mechanism for the solution-driven In2O3/ZnO HJ TFTs. These pioneering results have indicated the potential application of oxide-based 2DEG technology in large-area thin-film electronics. Despite these amazing progress, its widespread applications in practical electronics is currently blocked by the complicated operation of vacuum-based method and the required high temperature solution manufacturing processes to ensure the heterointerface formation with high-quality. Inspired by the aforementioned electrospun NFNs, an intriguing question arises as to whether oxide heterointerfaces with high quality can be achieved based on electrospun oxide nanofibers. Zhai et  al. have demonstrated that electrospun ZnO/SnO2 HJ nanofibers are potential candidates for fully transparent high performance photodetectors.[31] Meanwhile, Chen et al. have declared that electrospun conjugated polymers with heterojunction configuration have demonstrated potential application in constructing TFTs with elevated mobilities.[32] Despite the progress, there are no related reports on the con-struction of oxide HJ TFTs based on electrospinning. Thus, developing electrospinning strategy to implement oxide-based HJ TFTs will help to overcome important bottlenecks related to the performance and manufacturing level of TFT technologies.Herein, we report a stacked dual-channel (DC) HJ TFTs Tran-sistors consisting of alternating layers of In2O3 and ZnO treated by electrospinning. By carefully designing the TFT channel archi-tecture and changing the stacking density in both nanofibers, significant enhancement in both the electron mobility and TFT stress stability have been observed. Results have revealed that HJ TFTs based on ZnO/In2O3 (Z-On-I) configuration show higher electron mobility than these TFTs made of In2O3/ZnO (I-On-Z) HJ configuration due to the enhanced 2DEG and the reduced interface state density. By using the resistor load inverter based on ZnO/In2O3/Al2O3 TFT, the practical application of low-voltage operation logic circuit has obtained high voltage gain and excel-lent swing characteristics. The findings of this work bring a new perspective to the design principle of the next generation high-performance electrospun HJ TFT.2. Results and Discussion2.1. Characterizations of Electrospun Stacked NanofibersWe have recently shown the capability to grow continuous and uniform high-quality In2O3 nanofiber networks (NFNs) by elec-trospinning a suitable precursor solution.[33] Herein, by using the solution-based strategy, we deposited In2O3 and ZnO stacked NFNs with different stack order on Al2O3/p+-Si substrates by electrospinning of precursors comprising In(NO3)3·xH2O and Zn(NO3)3·5H2O in N,N-dimethylformamide (DMF), integrating bottom-gate, top-contact (BG-TC) double-channel (DC) TFTs based on aluminum (Al) source-drain (S-D) elec-trodes. Schematic diagram of manufacturing process for DC NFN TFTs is shown in Figure  S1 (Supporting Information). As-electrospun DC NFNs (I-On-Z and Z-On-I) with diameters of 100–200  nm are found to be randomly distributed to form a 3D network structure as determined by scanning electron microscope with different magnification (Figure  1a,b). Due to the terrible adhesion performance between NFNs and the gate dielectric, poor electronic contact and high interfacial state den-sity will lead to the degraded device performance inevitably.[13] The optimization of NFNs adhesion with substrates has been achieved based on UV-exposure combined with an annealing treatment. To investigate the feasibility of this approach, we treated the as-electrospun DC NFNs using UV irradiation and annealing. It can be seen that this treatment reduces their diameters of these NFNs with uniform morphology to a critical dimension (Figures S2 and S3, Supporting Information), which can be attributed to the release of the volatile molecules and the decomposition of organic polymer. This finding are also con-firmed by the corresponding magnified view of SEM images of single In2O3 and ZnO nanofiber, as displayed in Figure 1c.To further investigate the microstructure of nanofibers, the transmission electron microscope (TEM) and high resolution TEM (HRTEM) images were shown in Figure 2. The low mag-nification TEM images clearly show smooth and straight indi-vidual nanofibers (Figure 2a–e). The enlarged area of HRTEM images reveals the coexistence of the crystalline In2O3 and ZnO in the In2O3-ZnO stacked nanofibers (Figure  2b,c,f,g). The fast fourier transformation (FFT) of Figure 2b–f (Figure 2d–h) compare the calculated lattice spacing value with the theo-retical values and indicate the formation of the polycrystalline NFNs, confirmed by elemental mapping and x-ray diffraction (XRD) (Figure 2j). The stacked NFNs after treatment presented two fiber composite phases, suggesting the formation of cubic phase of In2O3 and wurtzite structure of ZnO layers.[33,34] In current work, the reason why to choose 500  °C for annealing can be noted from the detailed analysis of the thermogravi-metric (TG) curve (Figure S4, Supporting Information). Based Adv. Electron. Mater. 2023, 9, 2201007 2199160x, 2023, 2, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/aelm.202201007 by Cochrane Japan, Wiley Online Library on [13/02/2023]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensewww.advancedsciencenews.comwww.advelectronicmat.de2201007  (3 of 11) © 2022 The Authors. Advanced Electronic Materials published by Wiley-VCH GmbHon all the findings, it can be evident that each nanofiber is com-posed of single phase of either the In2O3 or the ZnO phase, rather than the solid-solution phase of In2O3-ZnO. The scan-ning TEM (STEM) images of the stacked NFNSs obtained with elemental mappings (Figure S5, Supporting Information) show high uniformity of component distribution, suggesting the real-ization of In2O3-ZnO HJ nanofibers with high-quality and their potential applications in electronic devices.Figure 1.  SEM images of as-electrospun DC NFNs. a) I-On-Z and b) Z-On-I configurations with different magnification. c) SEM images before and after UV and annealing treatment of single In2O3 (i,ii) and ZnO (iii,iv) NFNs. The inserts in c show the corresponding individual nanofiber images.Figure 2.  Low- magnification TEM images of a) In2O3 and e) ZnO nanofibers. HRTEM images of b,c) In2O3 and f,g) ZnO nanofibers. d,h) FFT images of figure b and f. i) The corresponding elemental mapping of In2O3 and ZnO nanofibers. j) XRD patterns of In2O3 and ZnO nanofibers annealed at 500 °C for 2 h.Adv. Electron. Mater. 2023, 9, 2201007 2199160x, 2023, 2, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/aelm.202201007 by Cochrane Japan, Wiley Online Library on [13/02/2023]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensewww.advancedsciencenews.comwww.advelectronicmat.de2201007  (4 of 11) © 2022 The Authors. Advanced Electronic Materials published by Wiley-VCH GmbH2.2. Performance Regulation of DC NFNs based TFTsTo investigate the performance evolution of electrospun DC NFNs TFTs, we fabricated BG-TC TFTs employing DC NFNs with different stacking order. Figure  3a demonstrates sche-matics of the various TFT architectures, consisting of Z-On-I (left) and I-On-Z (right) DC NFNs being integrated onto Al2O3/Si substrate. In general, the electrical properties of TFTs devices not only depend on the semiconductor layer, to some extent, the existence of a high-quality gate dielectric layer can optimize the device performance. Atomic layer deposition (ALD) derived Al2O3 layer was chosen to act as the gate dielectrics. The larger area capacitance density of 250  nF  cm−2 at a frequency of 20 Hz and smaller leakage current density of 5 × 10−9 A cm−2 at 2.0 MV cm−1 guarantee its potential application in TFT devices (Figure  3b).[33,35] Figure  3c shows the transfer characteristics for Z-On-I and I-On-Z DC NFN TFTs with different stacking order and different stacking density ratios (Z/I and I/Z), in which all devices exhibit a typical n-type characteristics. More importantly, all the devices performance can be optimized sig-nificantly by adjusting the ratio of the upper and lower oxide nanofibers of Z-On-I and I-On-Z DC NFNs, respectively. Espe-cially, all devices performance varies from single channel (SC) In2O3 NFN to SC ZnO NFN and in between (Figure S6, Sup-porting Information). This provides a feasibility to balance the electrical performance of a SC by stacking two different oxide NFNs with different stacking density.Figure  3d,e summary the functional relationship between electrical performance parameters and proportion of stacked nanofibers, in which these parameters are extracted from Figure 3.  a) Model diagram of DC NFN TFTs for Z-On-I and I-On-Z. b) Areal capacitance and leakage-current density of Al2O3 dielectric layer. c) Transfer characteristic curves for Z-On-I and I-On-Z TFTs with various proportions of Z/I and I/Z. d,e) Corresponding ION, IOFF,VTH, SS, and µSAT of Z-On-I and I-On-Z TFTs devices. f,g) Output characteristics of Z-On-I and I-On-Z TFTs with various proportions of Z/I and I/Z. h) Saturation current at a VGS of 2.5 V for Z-On-I and I-On-Z TFTs.Adv. Electron. Mater. 2023, 9, 2201007 2199160x, 2023, 2, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/aelm.202201007 by Cochrane Japan, Wiley Online Library on [13/02/2023]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensewww.advancedsciencenews.comwww.advelectronicmat.de2201007  (5 of 11) © 2022 The Authors. Advanced Electronic Materials published by Wiley-VCH GmbH10 devices. For devices with Z-On-I architecture, with increasing the top ZnO fibers density, the reduced ION and IOFF have been detected. The calculated saturation mobility (µSAT) decreases from 40.80 to 2.96  cm2  V−1  s−1and VTH changes from −0.4 to 1.2 V, indicating the working mode from depletion to enhance-ment type. These findings suggest that DC NFN TFTs have the electrical characteristics of two different oxides, which offset and optimize each other, and the ZnO nanofibers layer plays an important regulatory role. It can be noted that Z-On-I devices with Z/I of 1/2 demonstrate the optimized electrical perfor-mance, including a high µSAT of 40.32  cm2  V−1  s−1, a low VTH of 0.14 V, a large ION/IOFF of 4.7 × 107 and a small SS of 0.12 V/decade. Correspondingly, for I-On-Z TFTs, with the increase of the proportion of In2O3 fibers, the device performance is close to that of In2O3 and I-On-Z TFTs with I/Z of 2:1 display the best optimized performance. However, from the perspective of using In2O3 to adjust ZnO layer, the proportion of In2O3 NFNs should not exceed that of main ZnO NFNs, leading to the acceptable and optimal I/Z ratio of 1:1. However, it cannot be ignored that fixing the same stacking density ratios, Z-On-I TFTs have a more outstanding performance compared to that of I-On-Z TFTs with different stacking order. Therefore, it can be inferred that Z-On-I architecture can be selected to act as the optimal stacking NFNs for constructing DC TFTs. Figure  3f,g present representative sets of output characteristics measured for Z-On-I and I-On-Z DC NFNs TFTs. It can be noted that the output characteristic is enhanced with increasing the In2O3 nanofiber content, reflected by the saturation current at a VGS of 2.5 V (Figure 3h). It is obvious that highly conductive In2O3 nanofibers are beneficial to the promotion of the current. More detailed electrical performance parameters of these TFTs are summarized in Table  S1 (Supporting Information). Electrical performance parameters after regulation are much better than the previous reported SC NFN FETs (Table  S2, Supporting Information), suggesting that DC NFNs structure seems to be more effective and accurate to tune the performance of the TFT devices, compared with the traditional doping modification.Further experimental evidence on the existence of com-pletely different electron transport mechanisms between DC TFTs and SC TFTs has been observed. As well known, when a gate voltage VGS is provided, a large number of carriers (elec-trons or holes) will be induced to form a channel with thickness of about several nanometers between the semiconductor layer and the dielectric layer. Figure 4a displays the electronic trans-mission mechanism of the DC TFT under operation. Under the action of VGS, the electrons are gathered at the Al2O3 interface. Meanwhile, a suitable VDS is applied between source and drain electrodes, and the current loop is formed between the channel and the electrode. Figure 4b shows the off-state and on-state pri-mary electronic transmission path in Z-On-I and I-On-Z NFN TFTs. When VGS is less than VTH (0 < VGS < VTH), the conduc-tive channel located on the interface between the lower fibers and Al2O3 layer is in a high-resistance state and closed before the device is turned on. Under these conditions, the IOFF paths are in the top channel layer, as shown by the purple arrow. On the other hand, when the device is in the active state (VGS > VTH),  the electrons are repulsed to the Al2O3 interface at the positive voltage.[36–38] At this point, the paths of ION are shown by the red arrow. Regardless of the stacking method, the IOFF is deter-mined by the free electron density (Ne) of the upper layer and Figure 4.  a) Schematic diagram of electronic transmission model of DC HJ NFN TFTs. b) The main electronic transmission paths in on and off states of DC TFTs. c) The energy band diagram for the DC HJ structure. The areal density of electron in d) Z-On-I and e) I-On-Z configuration with different stacking density.Adv. Electron. Mater. 2023, 9, 2201007 2199160x, 2023, 2, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/aelm.202201007 by Cochrane Japan, Wiley Online Library on [13/02/2023]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensewww.advancedsciencenews.comwww.advelectronicmat.de2201007  (6 of 11) © 2022 The Authors. Advanced Electronic Materials published by Wiley-VCH GmbHthe stacking density of the upper fibers. Furthermore, the ION and µSAT are directly proportional to the Ne of the entire active layer, which is consistent with the behavior of the transfer curves displayed in Figure 3c.It must be noted that for Z-On-I structure, the µSAT is extremely excellent at Z/I of 1:2, similar to that of SC In2O3. The performance has been previously related to the existence of a 2DEG near the ZnO/In2O3 heterointerface, where the Fermi energy (EF) alignment between ZnO and In2O3 in contact leads to band bending (Figure  4c). The calculation and extraction of the values are displayed in Figure S7 (Supporting Informa-tion). In general, 2DEG could provide the high mobility of the anterior channel and reduce the IOFF of the posterior channel. In addition, it could lower the carrier scattering and improve the mobility.[3,32] This is clearly affected by interfacial 2DEG in Z-On-I and I-On-Z configuration with the same proportion of In2O3 and ZnO nanofibers, and the differences between them will be discussed in the next section.Interestingly, the turn-on voltage (VON) and SS are deter-mined by the lower nanofibers in both Z-On-I and I-On-Z stacking modes. They deviate from the value of SC devices as the stacking density of the underlying nanofibers decreases, and close to the value of SC devices composed of the upper nanofibers. In fact, this shift is still correlated with the evolu-tion of Ne in the channel. By using the following formula,[21] the Ne alterations have been estimated taking the difference in the VTH between Z-On-I and I-On-Z and SC In2O3 and ZnO NFNs, respectively.∆ =∆qeC Vi TH   (1)where Ci is the gate oxide capacitance per unit area and q is the elementary charge. Analyses from on Equation  (1) yield the areal density of excess electrons for Z-On-I and I-On-Z DC NFN TFTs, respectively (Figure  4d,e). It can be noted that Ne can be adjusted by modifying the stacking density of the upper nanofibers in DC configuration.After interchanging the stacking order of the DC nanofibers, it can be noted that the performance of the device has been adjusted greatly. In the process of modulation, the optimized performance of DC HJ TFTs has been observed in Z-On-I TFTs with Z/I of 1:2 and 1:1, respectively.To explore and explain this transition, the 2DEG between ZnO/In2O3 HJ interfaces and the interface state density (Ni) of the nanofibers are linked. Compared to I-On-Z structure, the Z-On-I configuration with a 2DEG system, charges accumulate at the interface, leading to the elevated µFE and ION. When the two oxides contact with each other, electrons transfer from ZnO to In2O3, and the surplus holes and electrons produce a built-in electric field (EBI) at the HJ interface, leading to the energy band bending. The 2DEG in the confined triangular potential well is expected to be delocalized along the channel plane on the In2O3 side, but is limited in the out-of-plane (z) direction.[20,39–41] For Z-On-I, the positive gate voltage is identical to EBI at the ZnO/In2O3 HJ interface, and the potential well depth increases, thus increasing the 2DEG concentration. The enhanced 2DEG will form an electronic transmission path at ZnO/In2O3 HJ inter-face, which cooperates with the back channel to optimize the electrical performance. However, at a low gate voltage, the 2DEG provides very limited carriers. However, for I-On-Z configuration with In2O3/ZnO HJ interface, the gate voltage will reverse with EBI, inhibiting the accumulation of 2DEG (Figure S8, Supporting Information). In comparison, the 2DEG effect on I-On-Z is limited,[42,43] resulting in lower ION and µSAT and a positive shift of VTH. About the effect of 2DEG between fiber networks on HJ TFTs, more work will be needed to deeply understand the detailed mechanism.Figure 5a shows the atomic force microscopy (AFM) of In2O3 (i and ii) and ZnO (iii and iv) nanofibers, respectively. Smoother In2O3 nanofibers than ZnO nanofibers have been observed, leading to the improved electrical performance confirmed by previous reports.[20,44] In addition, the chemical states of the nanofibers were analyzed by x-ray photoelectron spectroscopy (XPS) (Figure  5b,c; Figure  S9, Supporting Information). As shown in Figure 5b,c, the O 1s peaks can be deconvoluted into three subpeaks, which may be due to oxygen bound to metal (Oi, MOM,), oxygen vacancy (Oii, VO), and hydroxyl groups (Oiii, MOH), respectively.[45,46] The surface of MOH is well known for the carrier trap and captures electrons. The Oiii ratio of 9.4% in In2O3 is much lower than of ZnO (15.5%), providing a strong proof of the poor surface state of ZnO NFNs.The Ni, consisting of surface roughness, MOH bonding state, and some other factors, can be extracted from equation = −( )/1NSSlog eKT qCqii , where K and T are the Boltzmann con-stant and the absolute temperature.[47] Figure  5d shows the extracted Ni for devices with different HJ configuration. It can be noted that Ni increases with increasing density of ZnO nanofibers, which is extremely evident in the case of I-On-Z structure. In fact, to evaluate the effect of 2DEG and Ni on the electrical performance, we can estimate the relative mobility of Z-On-I to I-On-Z, which have the same proportion of In2O3 and ZnO fibers density (Figure S10, Supporting Information). As a result, it can be observed that the mobility in Z-On-I is larger than that of I-On-Z, suggesting the formation of more 2DEG and less Ni in Z-On-I structure.To further understand the interface trap density and reli-ability of the DC HJ NFN TFTs, low-frequency noise (LFN) measurements were carried out with a fixed gate overdrive voltage (VGS−VTH) of 1.0 V as well as VDS of 2.0 V as shown in Figure 5e,f. At low drain voltage, the carrier density distributes uniformly along the channel, implying that LFN can demon-strate the average defect density of the entire channel region.[48] Based On LFN measurements, it can be noted that DC HJ NFN TFTs conforms to the classical 1/f noise theory in the fixed fre-quency range.[10,48,49] Observably, compared with I-ON-Z TFTs, the normalized drain current noise spectral density (SID/IDS2) of I-ON-Z TFTs demonstrate a reduced trend, suggesting that the average trap density and interface trap density for I-ON-Z TFTs are reduced. To further confirm the main source of LFN of DC HJ TFTs, normalized SID/IDS2 properties were estimated and demonstrated in Figure 5g,h. In general, the mobility fluc-tuation (Δµ) model and carrier number fluctuation (ΔN) model have been adopted to explain the origin of the 1/f noise.[50,51] Here, the carrier number fluctuation model as well as mobility fluctuation model (ΔN−Δµ) is mostly used to analyze the LFN in DC NFN TFTs.[49,51] The slope values extracted from Figure 5g,h Adv. Electron. Mater. 2023, 9, 2201007 2199160x, 2023, 2, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/aelm.202201007 by Cochrane Japan, Wiley Online Library on [13/02/2023]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensewww.advancedsciencenews.comwww.advelectronicmat.de2201007  (7 of 11) © 2022 The Authors. Advanced Electronic Materials published by Wiley-VCH GmbHare about between −1.4 and −2, indicating the feasibility of ΔN−Δµ model. Therefore, the carrier number fluctuation attrib-uted to the capture and release of carriers by defect traps at the interface and localized states leads to the main source of 1/f noise. For device, local electrons in the conduction band tail state at low VGS can affect carrier capture and release on mobility more strongly than at the interface.[52] In this case, Δµ domi-nates the 1/f noise. Correspondingly, when providing the over VGS, the fermi level rises to the conduction band, leading to an increase in the channel carriers, which facilitates the capture of the interface trap carriers.[53] Here, ΔN dominates the 1/f noise. Note that in Z-On-I device, the slopes value shift from −1.45 to −1.62 with an increasing In2O3 density ratio, which may be  caused by HJ 2DEG. The physical distance between 2DEG and the gate dielectric surface is expected to suppress both long-range coulomb scattering by trapped charges and short-range scattering from dielectric surface topological imperfections and chemical defects,[32] which seems to weaken the dominant role of ΔN on 1/f noise. The various slope values of the I-On-Z are maintained around −2, indicating more ZnO nanofibers inter-face defects, confirmed by previous XPS and AFM results.2.3. Reliability Evolution and Application of DC HJ TFTsBesides their high electron mobilities and the reduced inter-face trap density, the DC HJ TFTs with Z-ON-I configuration are also expected to exhibit improved bias stability, which is another key figure of merit for their practical applications. Here, we subjected both transistors (Z/I of 1:2 and 1:1) to a continuous positive bias stress (PBS), negative bias stress (NBS) and negative bias illumination stress (NBIS), respec-tively. Figure 6a–d present the transfer characteristics for both devices measured during PBS and NBS operation. Remarkably, the associated PBS and NBS-induced shifts in VTH (ΔVTH) for Z-ON-I TFTs with Z/I of 1:1 are comparatively larger than those of Z-ON-I TFTs with Z/I of 1:2, indicating an improved stability behavior for TFTs with Z/I of 1:2. The smaller ΔVTH demon-strates the existence of less trapped charges at the dielectric and channel interface during PBS and NBS, confirmed by previous Ni characterization.We have shown that an NBS-stable Z-ON-I DC HJ TFTs can be created by eliminating interface defect states and trapped charges. However, in practical application, TFTs are exposed Figure 5.  a) AFM images of nanofibers. O 1s XPS spectra of b) In2O3 and c) ZnO nanofibers. d) Ni of DC HJ TFTs with different ratio of I/Z and Z/I. Normalized LFN spectra of e) DC Z-On-I and f) DC I-On-Z TFTs at VGS-VTH = 1.0 V and VDS = 2.0 V. The normalized SID/(IDS)2 curves as a function of (VGS–VTH) for g) DC Z-On-I and h) DC I-On-Z TFTs at f = 20 Hz.Adv. Electron. Mater. 2023, 9, 2201007 2199160x, 2023, 2, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/aelm.202201007 by Cochrane Japan, Wiley Online Library on [13/02/2023]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensewww.advancedsciencenews.comwww.advelectronicmat.de2201007  (8 of 11) © 2022 The Authors. Advanced Electronic Materials published by Wiley-VCH GmbHto much light illumination stresses. Herein, NBIS measure-ments were carried out to investigate the stability of Z-ON-I DC HJ TFTs with different Z/I ratios (Figure 6e–h). Commer-cially, NBIS instability is not as problematic as NBS and PBS because it can be easily overcome by using a light-shielding layer. However, for fully transparent electronic products, NBIS is a problem that should be solved soon. Compared to NBS, the ΔVTH for TFTs is more pronounced during prolonged light Figure 6.  a,b) PBS, c,d) NBS, e,f) NBIS-Red and g,h) NBIS-Violet of DC HJ Z-On-I TFTs with Z/I of 1:2 and 1:1, respectively. i) Corresponding changes in threshold voltage (ΔVTH) for the Z-On-I TFTs with Z/I of 1:2 and 1:1shown in figure a–h. j) VTCs, k) voltage gains and schematic diagram of the resistor-loaded inverter based on the Z-On-I (1:2) TFT. l) The noise margin extracted from the VTC curve at VDD = 2.5 V) The dynamic response behavior under AC square wave signal at 1 Hz.Adv. Electron. Mater. 2023, 9, 2201007 2199160x, 2023, 2, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/aelm.202201007 by Cochrane Japan, Wiley Online Library on [13/02/2023]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensewww.advancedsciencenews.comwww.advelectronicmat.de2201007  (9 of 11) © 2022 The Authors. Advanced Electronic Materials published by Wiley-VCH GmbHexposure, especially in purple light. Obviously, the impact of light illumination on the TFTs device is beyond doubt. Three models have been adopted to give plausible explanations of the instability behavior of the TFTs device under NBIS. Ambient interaction model is often used to explain the NBIS instability for devices, in which oxide layers are exposed to the atmos-phere.[54] In addition to H2O releasing electrons on the surface, desorption of adsorbed O2 increases the carrier in the channel is also the source of negative ΔVTH.[54–56] This interpretation seems plausible for nanofibers with a large specific surface area. Based on the oxygen-vacancy model, VO in the ground state transforms into an excited state of +VO2  under light excita-tion, which will serve as a shallow state to provide delocalized free electrons for the conduction band.[54,57,58] Sufficient VO in the nanofibers will provide conditions for excitation, leads to a pronounced shift under red and violet light. The hole-trapping model is the third models.[49,47,59] At a large gate bias stress, the holes generated by light excitation are captured by the VO or injected into the dielectrics, causing the negative ΔVTH. How-ever, relative to violet light, electron-hole pairs are not easily generated by red light. Therefore, much larger instability under violet light has been observed.The evolution of ΔVTH for Z-ON-I DC HJ TFTs with different channel configurations under PBS, NBS, and NBIS is displayed in Figure  6i. Noticeably, the Z-ON-I (1:1) DC HJ TFT suffers severe degradation caused by PBS (NBS), as evidenced by the larger ΔVTH. Increasing the stacking density of the bottom In2O3 layer (1:2) decreases the bias-stress effect, as the larger ION has been observed, as compared to Z-ON-I (1:1) TFT. In addition, it is interesting to see that a change has occurred in the NBIS by adjusting the stacking density of DC HJ TFTs. Ignoring the NBIS behavior under red light (the difference in ΔVTH between Z-ON-I (1:1) and Z-ON-I (1:2) TFT is only 0.01 V), the ΔVTH of Z-ON-I (1:2) TFT achieves smaller values under violet light. Furthermore, we attributed the relatively low NBIS stability of Z-ON-I (1:1) TFT to its higher defect states and lower free electron density. As a result, it can be concluded that the bias stability of the Z-ON-I DC HJ TFTs can be optimized by adjusting the stacking density of top and bottom layer, yielding transistors with high stress stability.To explore the potential application of DC HJ NFN TFTs in logic circuits, the Z-ON-I TFT (Z/I  =  1:2) with optimized elec-trical performance was selected to construct a resistor-loaded inverter by connecting the external load resistance of 2 MΩ (See the inset in Figure 6k). The typical voltage-transfer characteristics (VTCs) of the inverter are shown in Figure 6j, where the output high voltage (VOH) is close to the supply voltages (VDD), while the output low voltage (VOL) is close to 0 V. This benefits from the low off-state current of TFT and good negative bias stability, allowing that the inverter can effectively convert the input voltage signal and display good full swing characteristics.[60,61] Moreover, a suf-ficiently low subthreshold swing can ensure a good gain for the inverter.[49] Figure 6k shows the voltage gain values (-∂VOUT/∂VIN) under different VDD. Note that the extracted voltage gain has been found to increase with the increased VDD. The extracted maximum gain of 13.0 at VDD  =  2.5  V exceeds the minimum voltage gain required to drive the logic circuit components. Com-pared to the inverters based on NFN TFTs reported in recent years (Table S3, Supporting Information), the gain of 5.2 per unit voltage in this work is excellent enough. Noise margins (low-level noise and high-level noise margins) are also important parame-ters to describe the static characteristics of the inverter. As shown in Figure 6l, the high-level noise margins (NMH = VOH-VIH) and low-level noise margins (NML  = VIL  − VOL) of the inverter are determined to be 1.32 and 0.57 V at VDD = 2.5 V, respectively. The ratio of NMH to the VDD (52.8%) is higher than that required for logic circuit application (30%), indicating a strong anti-inverter interference ability and keeping the logic accuracy within a cer-tain range.[60] To obtain the alternative current (AC) characteristic of the inverter, the dynamic response behavior under AC square wave signal was carried out and demonstrated in Figure  6m. The output signal responds well to the input square wave signal, showing its possible applications in complex logic circuits.[16,62] The low operating voltage and full swing characteristic have turned out to be an effective way to construct low power logic electronic devices by using DC HJ NFN TFTs.3. ConclusionsIn summary, we have developed electrospinning-driven DC NFN architectures by adjusting the stacking order and the stacking density of In2O3 and ZnO layers. DC NFN TFTs based on Z-On-I and I-On-Z configurations were implemented, which produced excellent electrical performance, including high elec-tron mobility (>40  cm2  V−1  s−1) and operational stability. The successful design strategy in our devices originates from the improved 2DEG and the reduced Ni in Z-On-I HJ architec-ture. The adjustment of the stacking density of NFNs has been shown to enable controlled density of electron of the DC HJ TFTs, providing additional modification over the characteristics of these high-electron-mobility TFTs. Bias and illumination-stress stability characterizations, combined with LFN analysis, have indicated that the DC HJ design can effectively eliminate the operational instability of SC while maintaining a high-performance device. Successful integration of resistor-loaded inverter with excellent logic capabilities implied the potential application of DC HJ NFN TFTs in future logic electronics. Our electrospinning-derived DC HJ design strategy could poten-tially solve the inherent shortcomings of SC TFTs s and provide a feasible and reliable route in building TFTs with operating characteristics exceeding the current state of the art.Supporting InformationSupporting Information is available from the Wiley Online Library or from the author.AcknowledgementsThis work was supported by National Natural Science Foundation of China (11774001) and Anhui Project (Z010118169).Conflict of InterestThe authors declare no conflict of interest.Adv. Electron. Mater. 2023, 9, 2201007 2199160x, 2023, 2, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/aelm.202201007 by Cochrane Japan, Wiley Online Library on [13/02/2023]. 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