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Ayaz Ali, Matthias Schrade, Wen Xing, Per Erik Vullum, Ozhan Koybasi, [Takashi Taniguchi](https://orcid.org/0000-0002-1467-3105), [Kenji Watanabe](https://orcid.org/0000-0003-3701-8119), Branson D. Belle

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[Two‐Dimensional Heterostructure Complementary Logic Enabled by Optical Writing](https://mdr.nims.go.jp/datasets/9cceed78-822a-4ad4-80a0-ca6a16e61012)

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Two-Dimensional Heterostructure Complementary Logic Enabled by Optical WritingTwo-Dimensional Heterostructure Complementary LogicEnabled by Optical WritingAyaz Ali, Matthias Schrade, Wen Xing, Per Erik Vullum, Ozhan Koybasi,Takashi Taniguchi, Kenji Watanabe, and Branson D. Belle*1. IntroductionThe standard complementary metal-oxide semiconductor(CMOS) implementation of logic circuits uses both p- and n-typefield effect transistors (FETs), fabricated on the same siliconchip.[1] Compared to earlier technologiesconsisting of only either n- or p-typeFETs, the main advantage of CMOS logicis higher energy efficiencies as energy dis-sipation mostly occurs during switchingevents, although continuous downscalinghas increased the contribution of staticenergy dissipation also in complementarytechnologies. As a result, heat dissipationis a major problem for modern processorsand the size of cooling units has increasedin line with the advances in computingpower.[2] It is therefore clear that technolo-gies beyond silicon must be complemen-tary, i.e., based on both p- and n-typeFETs, to keep heat dissipation to aminimum.Two-dimensional (2D) semiconductorssuch as transition metal dichalcogenides(TMDCs) have garnered significant interestdue to their remarkable properties whichinclude high carrier mobility, trap-free sur-faces without dangling bonds, high in-plane thermal conductivityfor efficient heat dissipation, and band gap tunability.[3–6] Thesematerial properties allow the realization of FETs with excellentperformance metrics for logic applications such as on/off currentratios of up to 108 and subthreshold swing of down toA. AliDepartment of Smart Sensor SystemsSINTEF DIGITALForskningsveien 1, Oslo 0373, NorwayA. AliResearch Center for Frontier Fundamental StudiesZhejiang LabHangzhou 311100, ChinaA. AliDepartment of Electronic EngineeringUniversity of SindhJamshoro 76080, PakistanThe ORCID identification number(s) for the author(s) of this articlecan be found under https://doi.org/10.1002/smsc.202300319.© 2024 The Authors. Small Science published by Wiley-VCH GmbH. Thisis an open access article under the terms of the Creative CommonsAttribution License, which permits use, distribution and reproductionin any medium, provided the original work is properly cited.DOI: 10.1002/smsc.202300319M. Schrade, W. Xing, B. D. BelleDepartment of Sustainable Energy TechnologySINTEFForskningsveien 1, Oslo 0373, NorwayE-mail: branson.belle@sintef.noP. E. VullumDepartment of Materials and NanotechnologySINTEFHøgskoleringen 5, Trondheim 7034, NorwayO. KoybasiDepartment of Microsystems and Nanotechnology (MiNaLab)SINTEF DigitalOslo 0373, NorwayT. TaniguchiResearch Center for Materials NanoarchitectonicsNational Institute for Materials Science1-1 Namiki, Tsukuba 305-0044, JapanK. WatanabeResearch Center for Electronic and Optical MaterialsNational Institute for Materials Science1-1 Namiki, Tsukuba 305-0044, JapanIntegrated logic circuits using atomically thin, two-dimensional (2D) materialsoffer several potential advantages compared to established silicon technologiessuch as increased transistor density, circuit complexity, and lower energy dis-sipation leading to scaling benefits. In this article, a novel approach to achievetunable doping in 2D semiconductors is explored to achieve complementarytransistors and logic integration. By selectively transferring WSe2 onto hBN andSiO2 substrates, complementary transistor behavior (n- and p-type) was achievedusing a UV light source and electrostatic activation. Furthermore, advancedcharacterization techniques, including high-resolution transmission electronmicroscopy (HRTEM) and Kelvin probe force microscopy (KPFM), providedinsights into the chemical composition and surface potential changes after UVwriting. Finally, a logic inverter was successfully implemented using selectivelyphoto-induced doped WSe2 transistors, showcasing the potential for practicallogic applications. This innovative method opens new avenues for designingenergy-efficient and reconfigurable 2D semiconductor circuits, addressing keychallenges in modern electronics.RESEARCH ARTICLEwww.small-science-journal.comSmall Sci. 2024, 4, 2300319 2300319 (1 of 9) © 2024 The Authors. Small Science published by Wiley-VCH GmbHhttps://doi.org/10.1002/smsc.202300319http://creativecommons.org/licenses/by/4.0/http://creativecommons.org/licenses/by/4.0/mailto:branson.belle@sintef.nohttp://www.small-science-journal.com60mV dec�1.[7] Several groups have recently reported the fabri-cation and characterization of initially simple but increasinglycomplex logic circuits in 2D materials.[8–17] However, most ofthis work is based on only one type of carrier type, for example,n-type in the case of the most studied material MoS2, and thebenefits of a complementary implementation in 2D materialsremain largely unexplored. The difficulty in achieving therequired conduction type in 2D materials relates to the problemthat doping strategies from established bulk semiconductortechnologies, namely silicon, cannot be simply transferred tothese materials. In silicon, p- and n-type regions are definedby implantation of high energy ions. This strategy would leadto beam damage and device degradation if applied to devicesmade from atomically thin materials.[18] Complementary logiccircuits have thus been realised using intrinsic p- and n-type2D materials normally on separate chips, for example, MoS2and WSe2 for, respectively, the n- and p-type FET’s.[19]However, due to complicated fabrication processes, scalabilityconcerns, and integration challenges, alternative concepts to con-trol carrier type and concentration within the same channelmaterial are needed.Charge transfer doping from adsorbed species[20–22] or depos-ited materials,[23,24] channel thickness or interfacial layer thick-ness modulation[25,26] and metal contacts with different workfunctions[24,27] are a few of the strategies that have beenemployed in an effort to influence the carrier type of 2Dsemiconductors. However, these techniques cause unpredictablecharge transfer and Fermi level pinning at intrinsic defects,resulting in weak tunability of the transport properties ofthese devices[21,26] in addition to significant charge carrierscattering.[27] Another approach for complementary integrationof 2D materials uses electrostatic doping via so called polaritygates, which turns different regions of the device into p- andn-type conductors when biased.[28] This approach offers the addi-tional flexibility of reconfigurability by simply changing theapplied voltage but increases the device footprint and fabricationcomplexity due to additional contacts and added deposited layers.A recently emerging strategy towards reconfigurable control oftransport properties is optical doping.[29] For example, Seo et al.[30]recently demonstrated an innovative method based on lightillumination to achieve reconfigurable doping in 2D materials.In this case, a single flake of MoTe2 on SiO2 substrate wassequentially illuminated with two light sources of differentwavelengths (532 and 355 nm). The illuminated areas of the flakethen exhibited n- and p- type behaviour resulting in complemen-tary logic.In this article, we use a single light source to flood illuminate asingle sheet of WSe2 which was selectively transferred on hBNand SiO2 substrates. Although a similar strategy has been used todope MoTe2 flakes,[31] they did not achieve ambipolarity of theirdoped devices. In our case, we achieved controllable p- and n-typepolarity leading to an ambipolar homojunction resulting in ademonstrable logic inverter logic. We further show that this dop-ing strategy leads to the diffusion of B and N atoms to the surfaceof the WSe2 layer, where hBN is the substrate contributing tochanges in the Fermi level of the WSe2 conducting layer.Moreover, we suggest, that the substrate can be selectively pat-terned to increase the transistor density and circuit complexityleading to scaling benefits.2. Results and Discussions2.1. Device Structure and Transport PropertiesThe structural arrangement of the WSe2 FETs employed in ourstudy is presented in Figure 1a in which a WSe2 flake is directlytransferred on the SiO2/Si substrate and a hBN flake using a drytransfer technique[32] such that half the flake spans the hBN andSiO2. This type of device structure provides an excellent systemto directly compare the transport properties of WSe2/SiO2(Device A) and WSe2/hBN/SiO2 (Device B) FET devices.Figure 1b shows an optical microscopy image of the WSe2/SiO2and WSe2/hBN/SiO2 FET devices. For clarity, we emphasize thatthe same WSe2 flake is used to create both the SiO2 andhBN/SiO2 devices. Raman spectrum of WSe2 on SiO2 is pre-sented in Figure 1c. The E12g band at 247.5 cm�1 and A1g bandat 256.5 cm�1 which correspond to the in-plane and out-of-planevibrations suggest that the WSe2 is trilayer.[33] The number ofWSe2 layers was also confirmed by high-resolution transmissionelectron microscopy (HRTEM) (Figure S3, SupportingInformation). Raman spectroscopy of WSe2/hBN/SiO2 was alsoconducted and compared with WSe2/SiO2, see supporting infor-mation Figure S2, Supporting Information. There is a slightrelative red shift in the peak positions of 0.7 cm�1 which corre-sponds to p-type doping of WSe2 on hBN.[21] The electrical char-acterization of the fabricated devices was carried out in darkconditions. Figure 1d,e show the transfer characteristics of theWSe2/SiO2 and WSe2/hBN/SiO2 FETs, respectively. For effec-tive comparison between both devices, the channel length waskept identical (5 μm). The gate-source bias (Vgs) was scannedfrom þ50 to �50 V and the drain-source current (Ids) wasrecorded under different drain-source voltages (0.01, 0.5, and1 V). Device A exhibits unipolar conduction (p-type) with a maxi-mum p-ION current of 27 μA at Vgs –50 V and Vds 1 V.The device has a hole mobility of μh= 45.69 cm�2 V�1s�1 andthe minimum conduction point (MCP) was located beyondþ50 V while device B shows ambipolar transport with a domi-nant p-branch having a maximum p-ION current of 0.5 μA atthe same gate voltage, hole mobility of μh= 5.10 cm�2 V�1s�1and the MCP shifted to �10 V. The corresponding output curvesare shown in Figure S4, Supporting Information where it isobserved that device A exhibits near ohmic behavior whereasdevice B shows non-ohmic behavior for the same metal contacts(Ti/Au) deposited at the same time under the same conditions.This points to a difference in the work function of the WSe2 layeron hBN, which leads to increased contact resistance and lessdrain-source current. The absence of ambipolarity in deviceA could be due to the Fermi level pinning at the thin WSe2/SiO2interface where charge trapping occurs in oxide defect bands.[34]In contrast, hBN is well known as an ideal substrate for 2D mate-rials and forms ultraclean interfaces with fewer charge trappingcenters.[35–37] This leads us to infer that hBN reduces Fermi levelpinning thereby enabling the manifestation of ambipolar trans-port in device B.2.2. Effect of Optical WritingThe fabricated devices were then exposed to a UV LED(λ 280 nm, power 8mW cm�2) under a constant Vgs for 5 minwww.advancedsciencenews.com www.small-science-journal.comSmall Sci. 2024, 4, 2300319 2300319 (2 of 9) © 2024 The Authors. Small Science published by Wiley-VCH GmbH 26884046, 2024, 5, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/smsc.202300319 by Cochrane Japan, Wiley Online Library on [17/05/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensehttp://www.advancedsciencenews.comhttp://www.small-science-journal.com(referred to as writing voltage) and then the transfer character-istics of device A, device B, and device C (one electrode onWSe2/hBN and another electrode onWSe2/SiO2 thereby creatinga device at the junction of hBN) were measured. Figure 2 showsthe transfer curves of the three device types after being writtenwith different voltages (�40 and �100 V). The transfer curvesdemonstrate that tunable n-type doping can be achieved in deviceB and that the polarity of the device can be transformed fromambipolar to unipolar n-type for larger writing voltages(Figure 2b). On the contrary, device A shows a relatively weakresponse to negative writing voltages and a small decrease in holecurrent is observed. The n-type doping in device A is probably aresult of Se vacancies formation in WSe2 under UV illumina-tion,[30] while the polarity of the device remained the same(unipolar p-type) (Figure 2a). The output curves of deviceA and device B at writing voltage of –100 V are presented inFigure S5, Supporting Information. Furthermore, repeatableambipolar transport was observed in device C (Figure 2c) whenthe writing voltage was set to –100 V under UV exposure. Theoutput characteristics of device C after writing (at –100 V) showa gate dependent rectifying effect (Figure S6, SupportingInformation) confirming the formation of a lateral WSe2 p–nhomojunction diode. From the transfer curves (Figure 2b), itwas also observed that as the writing voltage becomes more neg-ative, the on current increases (electron branch) and the thresh-old voltage decreases, leading to an increase in electron doping inthe WSe2 channel.[38] The electron carrier concentration as afunction of writing voltage in WSe2/hBN channel was calculatedusing the parallel-plate capacitor model[39] (Equation (1))ne ¼ CtðVg–V thÞ=e (1)where Ct is the total capacitance of the SiO2 and hBN substratelayers, Vg is the gate voltage, Vth is the threshold voltage, and e isthe electron charge. The electron carrier concentration for deviceB is estimated as 1.68� 1012 cm�2 for a writing voltage of –40 VFigure 1. Device structure and transport properties. a) Schematic of WSe2/SiO2 (Device A) and WSe2/hBN/SiO2 (Device B) FET devices, b) Opticalimage of a fabricated device, c) Raman spectrum of WSe2 on SiO2 substrate, d,e) Transfer characteristics of the WSe2/SiO2 and WSe2/hBN/SiO2 FETnative devices under different drain-source voltages both in linear (solid line) and log scale (dashed line).www.advancedsciencenews.com www.small-science-journal.comSmall Sci. 2024, 4, 2300319 2300319 (3 of 9) © 2024 The Authors. Small Science published by Wiley-VCH GmbH 26884046, 2024, 5, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/smsc.202300319 by Cochrane Japan, Wiley Online Library on [17/05/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensehttp://www.advancedsciencenews.comhttp://www.small-science-journal.comand increases to 3.84� 1012 cm�2 as writing voltage changes to�100 V (Figure 2d). Furthermore, the electron mobility of deviceB follows a similar trend. On the contrary, device A exhibits theopposite behavior wherein by increasing the absolute value ofthe writing voltage, threshold voltage increases, and on currentdecreases (hole branch), suggesting n-type doping. The esti-mated hole concentration decreases from 2.86� 1012 to2.58� 1012 cm�2 when writing voltage changes from �10 to�100 V for device A (Figure S7, Supporting Information).2.3. Material Characterization After WritingTo further investigate the effect of the photoinduced doping onthe WSe2 devices, amplitude modulated Kelvin probe forcemicroscopy (AM- KPFM) was used to gain an insight into thesurface potential and by extension work function of the devicesA-C before and after UV writing. In this case, the device was writ-ten for 5min with a writing voltage of �50 V. Experimentaldetails and topography details are shown in the experimental sec-tion and Figure S8, Supporting Information. As shown inFigure 3a, the AM-KPFM scans show that in its native state,device A has a surface potential of around 60mV less thandevice B. This is further evidence that hBN reduces the Fermilevel pinning and thereby reduces the work function of WSe2on hBN (device B). After the writing process (Figure 3b), thedifference in the surface potential changes to around 100mV.This difference in surface potential is likely an underestimateof the true difference due to the averaging nature of AM-KPFM.[40] Previous works[41] have shown that WSe2 lateral homo-junctions can be created using ion-beam irradiation where thearea of the sample which has been irradiated completely losesits p-type conductivity. Their KPFM analysis showed that therewas a difference of 55mV between the irradiated and pristineareas of the WSe2 flake, sufficient enough to turn off conductivityin the irradiated sections of the flake. More details are given inSupporting Information Figure S9, Supporting Information.The change in surface potential can be translated to a changein work function after calibration of the tip (details in the experi-mental section) as shown in Figure 3c. The photoinduced-electron doping mechanism in WSe2 on hBN is presented inthe band diagram shown in Figure 3d wherein by illuminatingUV light, electrons in the defect states of hBN acquire enoughenergy to be excited to the conduction band of hBN[42] anddue to applied negative gate voltage these excited electrons movetoward the conduction band of WSe2, leading to n-type doping inWSe2. The positively charged defects remain in hBN and alter thelocal electric field.[43,44] The electron transfer process from hBNto WSe2 persists until the applied writing voltage is completelyneutralized by the positively charged defects.[42]The effect of the photoinduced doping observed in our deviceswas investigated using HRTEM on the device shown inFigure 2. Transport characteristics of various WSe2 FETs after photoinduced doping. a) Transfer curves of device A, b) device B, and c) device C after UVwriting at different writing voltages (�40 and �100 V) with 5min of UV illumination. d) Carrier concentrations of device B as a function of writingvoltages.www.advancedsciencenews.com www.small-science-journal.comSmall Sci. 2024, 4, 2300319 2300319 (4 of 9) © 2024 The Authors. Small Science published by Wiley-VCH GmbH 26884046, 2024, 5, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/smsc.202300319 by Cochrane Japan, Wiley Online Library on [17/05/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensehttp://www.advancedsciencenews.comhttp://www.small-science-journal.com(a) (b)(c)Figure 3. Surface potential and band diagram. a,b) AM-KPFM images of WSe2/SiO2 and WSe2/hBN FETs before and after writing, c) work functionextracted from AM-KPFM data, and d) schematic illustrating photoinduced-doping mechanism in WSe2/hBN heterostructure under UV light illuminationand negative gate voltage.Figure 4. HRTEM characterization. a) After writing, high angle annular dark field (HAADF) STEM image of WSe2/SiO2 and WSe2/hBN region of thedevice, b,c) high resolution bright field TEM images of WSe2/SiO2 and WSe2/hBN, and d) quantified profile (based on EELS mapping) of the chemicalcomposition below the electrode in device B. In EELS, the Si K- and the WM-edges overlap and therefore give artificial Si contents in the crystalline layeron top of WS2.www.advancedsciencenews.com www.small-science-journal.comSmall Sci. 2024, 4, 2300319 2300319 (5 of 9) © 2024 The Authors. Small Science published by Wiley-VCH GmbH 26884046, 2024, 5, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/smsc.202300319 by Cochrane Japan, Wiley Online Library on [17/05/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensehttp://www.advancedsciencenews.comhttp://www.small-science-journal.comFigure S10, Supporting Information, after it had been writtenwith a writing voltage of - 100V. A focused ion beam/scanningelectronmicroscope (FIB/SEM) was used to create a thin lamella,the details of which are presented in the experimental sectionand the supplementary information. Figure 4a shows a highangle annular dark field STEM image of the device, centeredaround the edge of the hBN flake (device C). As observed, theedge of the hBN flake is not sharp and there is a small inclineover a length of about 200 nm with small areas where the WSe2flake is not in contact with the substrate. These areas or“air-gaps” create small regions of reduced doping and low para-sitic capacitance which can lead to an increased conductivity ofdevice C as previously demonstrated.[16] Further details of the“air-gaps” are shown in Figure S11, Supporting Information.Figure 4b,c show high resolution bright field TEM images ofdevices A and B. We observe an unknown crystalline layer onthe surface of WSe2 which is on hBN. This layer is absent onthe WSe2 which is on SiO2. In Figure 4d, a line profile of thechemical composition, based on electron energy loss spectros-copy (EELS) mapping, is shown from a region under the elec-trode of device B. The unknown crystalline layer is composedof a mixture of B, N, W, and Se. The first part of this layer isrich in B and N. Firstly, the B concentration starts to decay, thenthe N concentration. The top of the crystalline layer is richin W and Se. This additional layer is observed both under andon the sides of the Au contacts on top of the WSe2 on hBN(Figure S12 and S13, Supporting Information). We propose thatthis layer, which contributes to the doping of the WSe2 in addi-tion to the defect states in the hBN substrate, originates fromdiffusion processes which may occur during the writing processthat occurs at high electrical fields. It is well known that this typeof gate stress test can lead to instabilities in FETs.[45] Additionally,transfer curves of device C after UV writing at different writingvoltages (Figure S14, Supporting Information) suggest theinvolvement of two mechanisms: one at low writing voltages(�10 to �30 V) and one at greater writing voltages. One hypoth-esis is that at small writing voltages, only Se vacancies and inter-face traps contribute to the doping process however at largerwriting voltages, diffusion processes transport B and N to thesurface as seen in Figure 4.2.4. WSe2 Logic Inverter DemonstrationAs a proof of concept of our tunable n-type doping mechanism,we demonstrate a complementary inverter using the same deviceas shown in Figure 1a. The photoinduced doping along with elec-trostatic activation allowed us to create unipolar n-type transportin the WSe2/hBN channel while keeping the WSe2/SiO2 channelunipolar p-type. To form a complementary inverter, theWSe2/SiO2 transistor (pull-up) was externally connected in aseries with the WSe2/hBN transistor (pull-down). The input sig-nal (Vin) was applied to the common back gate and the outputFigure 5. WSe2 logic inverter. a) WSe2 inverter schematic and circuit diagram, b) voltage transfer characteristics of WSe2 inverter at different supplyvoltages, c) practical demonstration of inverting circuit, where the input signal is inverted, and d) voltage gain of the WSe2 inverter at supply voltage of 1 V.www.advancedsciencenews.com www.small-science-journal.comSmall Sci. 2024, 4, 2300319 2300319 (6 of 9) © 2024 The Authors. Small Science published by Wiley-VCH GmbH 26884046, 2024, 5, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/smsc.202300319 by Cochrane Japan, Wiley Online Library on [17/05/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensehttp://www.advancedsciencenews.comhttp://www.small-science-journal.comsignal was collected from the shorted source drain terminal ofpull-up and pull-down transistor respectively as shown inFigure 5a. Figure 5b shows the transfer curves of the WSe2 com-plementary inverter at different supply voltages (Vdd= 0.1–1 V).When a negative gate voltage is applied to the inverter, the WSe2/SiO2 transistor (device A) is turned ON while the WSe2/hBNtransistor (device B) is at OFF state, resulting in the supply volt-age of pull-up transistor appearing at the output terminal whichrepresents the logic “1”. In contrast, when a positive gate voltageis applied to the inverter’s input, the WSe2/SiO2 transistor(device A) is turned OFF, therefore, no supply voltage appearsat the output terminal and thus represents the logic “0” state(Figure 5b). Figure 5c clearly indicates that the input square wavesignal is inverted with a finite delay and rise time due to a largesubthreshold swing.[46] Figure 5d illustrates the voltage gain ofthe inverter, which is an important performance parameterand is expressed as Vgain= |dVout/dVin|. The observed modestvoltage gain well below the threshold of 1 for practicalapplications is directly related to the low capacitance of ourdevice, originating in the 300 nm thick SiO2 layer. Replacing thislayer with a thinner layer of SiO2 or preferably a high-k gatedielectric, will significantly increase voltage gain, allow betterswitching control and improve overall performance of theinverter.[46] Power consumption is also an important parameterto evaluate the performance of the logic inverter. Our fabricatedinverter demonstrates a peak power consumption of 2.25 nW.The calculated power consumption is illustrated in Figure S15,Supporting Information, which – a consequence of the low volt-age gain – favourably aligns with values reported in the literature,as summarized in Table 1. To study the stability of photo-induceddoping, the performance of the fabricated inverter was continu-ously monitored for 4 weeks in the dark environment, andnegligible degradation was observed (Figure S16, SupportingInformation). More complexed logic circuits are possible bypre-patterning the hBN substrate prior to WSe2 transfer.3. ConclusionIn conclusion, we have shown that WSe2 field effect transistorson hBN substrate exhibited ambipolar behaviour, allowing bothn-type and p-type conduction, while the devices on SiO2 substrateexhibited unipolar p-type behaviour. The optical writing inducedtuneable n-type doping in the WSe2 devices on hBN substrate,leading to a change in carrier concentration, carrier type andmobility. The study also revealed the formation of a crystallinelayer containing boron, nitrogen, tungsten, and selenium onthe surface of WSe2, suggesting a diffusion-based doping mech-anism during the writing process. Finally, an optical writingstrategy was used to demonstrate a complementary logic inverterbased on homogenous WSe2 transistors.4. Experimental SectionDevice Fabrication: Few-layer WSe2 were mechanically exfoliated andtransferred on a pre-prepared 60 nm thick hBN flake and SiO2 substrateby a dry transfer technique in such a way that the WSe2 flake lies on bothhBN and SiO2 (Figure S1, Supporting Information). E-beam lithography(EBL) and reactive ion etching was used to pattern the WSe2 channel.Finally, EBL and electron-beam evaporation were used to realize the elec-trodes followed by lift-off of titanium/gold (5/110 nm) metals.Electrical Characterization: Electrical characterization of the devices wasperformed using a two-point configuration with a Keithley 2440 sourcemeter. The gate voltage was applied by a Keithley 2450 instrument,and all data were recorded by a customized LabVIEW program. Thefield-effect carrier mobility (μ) was calculated by using Equation (2).μ ¼ ½dIds=dVg� � ½L=ðWCtVdsÞ� (2)where dIds/dVg is the transconductance and obtained from the transfercurve, L and W are the length and width of the channel, respectively,Ct is the total capacitance per unit area and Vds is the drain-source voltage.AM-KPFM Characterization: AM-KPFM was carried out using a BrukerMultimode AFM. A Pt/Ir conductive tip (SCM-PIT-V2) was used for theKPFM experiments. Here, the contact potential difference (VCPD)between the film and tip is compensated by applying an external bias volt-age. The work function of the sample (ϕs) can be obtained from the VCPDvia the following Equation (3)[47,48]VCPD ¼ ðϕM� ϕsÞq(3)where ϕM is the work function of the metal tip and q is the elementarycharge.TEM Characterization: TEM sample preparation was performed using aHelios G4 UX dual-beam focused ion beam (FIB). A 3 μm thick carbonlayer was deposited on the region of interest prior to cutting out theTEM lamella. The first part of this carbon protection layer was depositedby e-beam assisted deposition to avoid Gaþ damage in the region ofinterest. During ion beam thinning, an ion-beam acceleration voltageof 30 kV was used for coarse thinning with final thinning performed at5 and 2 kV on either side of the lamellae to minimize surface damage.Table 1. Comparison of performance parameters of reported 2D semiconductor-based inverters.Materials Doping method Bias voltage [V] Gain Power consumption [nW] Refs.MoTe2 p-n homojunction Laser-induced doping (532 and 355 nm) 0.1 0.03 – [30]p-MoSe2/n-MoSe2 Substitutional doping 10 34 127 [49]p-WSe2/n-WS2 Intrinsic property 5 1.5 – [50]p-WSe2/n-WSe2 Chemical doping (iodine vapor) 3 0.8 – [51]MoTe2 p-n homojunction ALD-induced doping 2 29 80 [23]MoTe2 p-n homojunction Chemical doping 1 – 90 [52]P-MoSe2/n-MoSe2 Substitutional doping 1 0.5 – [53]WSe2/SiO2–WSe2/hBN p-n homojunction UV LED-induced doping 1 0.06 2.25 This workwww.advancedsciencenews.com www.small-science-journal.comSmall Sci. 2024, 4, 2300319 2300319 (7 of 9) © 2024 The Authors. Small Science published by Wiley-VCH GmbH 26884046, 2024, 5, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/smsc.202300319 by Cochrane Japan, Wiley Online Library on [17/05/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensehttp://www.advancedsciencenews.comhttp://www.small-science-journal.comTEM was performed at 200 kV using a double Cs aberration corrected coldFEG JEOL ARM 200FC. Spectroscopy was performed in scanning trans-mission electron microscopy (STEM) mode by simultaneous acquisitionof energy dispersive spectroscopy (EDS) and electron energy loss spec-troscopy (EELS) data. EDS was done with a 100 mm2 Centurio detectorcovering a solid angle of 0.98 sr, while EELS were performed with a GIFQuantum ER operating in dual-EELS mode.Supporting InformationSupporting Information is available from the Wiley Online Library or fromthe author.AcknowledgementsThe authors acknowledge financial support from the Research Council ofNorway (RCN) through 2Dsense (grant no. 280788) under the INDNORprogram. RCN is also acknowledged for support to the Norwegian Micro-and Nano-Fabrication Facility (NorFab, grant no. 295864), the NORTEMinfrastructure (grant no. 197405). A. A. also acknowledges the supportfrom Higher Education Commission (HEC) Pakistan (grant no.20-14470/NRPU/R&D/HEC/2021). Growth of hexagonal boron nitridewas supported by the JSPS KAKENHI (grant nos. 20H00354, 21H05233,and 23H02052) and World Premier International Research CenterInitiative (WPI), MEXT, Japan.Conflict of InterestThe authors declare no conflict of interest.Data Availability StatementThe data that support the findings of this study are available from thecorresponding author upon reasonable request.Keywords2D materials, complementary metal-oxide semiconductor, field effecttransistors, logic invertersReceived: November 30, 2023Revised: February 5, 2024Published online: March 1, 2024[1] B. Davari, W. H. Chang, M. R. Wordeman, C. S. Oh, Y. Taur,K. E. Petrillo, D. Moy, J. J. Bucchignano, H. Y. Ng, M. G. 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Small Science published by Wiley-VCH GmbH 26884046, 2024, 5, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/smsc.202300319 by Cochrane Japan, Wiley Online Library on [17/05/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensehttp://www.advancedsciencenews.comhttp://www.small-science-journal.com Two-Dimensional Heterostructure Complementary Logic Enabled by Optical Writing 1. Introduction 2. Results and Discussions 2.1. Device Structure and Transport Properties 2.2. Effect of Optical Writing 2.3. Material Characterization After Writing 2.4. WSe2 Logic Inverter Demonstration 3. Conclusion 4. Experimental Section