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[Meiyong Liao](https://orcid.org/0000-0003-1361-4266), Huanying Sun, [Satoshi Koizumi](https://orcid.org/0000-0003-4961-5658)

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[High‐Temperature and High‐Electron Mobility Metal‐Oxide‐Semiconductor Field‐Effect Transistors Based on N‐Type Diamond](https://mdr.nims.go.jp/datasets/9dcfba80-11a4-4e0e-8d45-ddc37c8d7152)

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High‐Temperature and High‐Electron Mobility Metal‐Oxide‐Semiconductor Field‐Effect Transistors Based on N‐Type DiamondRESEARCH ARTICLEEditor’s Choice www.advancedscience.comHigh-Temperature and High-Electron MobilityMetal-Oxide-Semiconductor Field-Effect Transistors Basedon N-Type DiamondMeiyong Liao,* Huanying Sun, and Satoshi Koizumi*Diamond holds the highest figure-of-merits among all the knownsemiconductors for next-generation electronic devices far beyond theperformance of conventional semiconductor silicon. To realize diamondintegrated circuits, both n- and p-channel conductivity are required for thedevelopment of diamond complementary metal-oxide-semiconductor (CMOS)devices, as those established for semiconductor silicon. However, diamondCMOS has never been achieved due to the challenge in n-type channel MOSfield-effect transistors (MOSFETs). Here, electronic-grade phosphorus-dopedn-type diamond epilayer with an atomically flat surface based on step-flownucleation mode is fabricated. Consequently, n-channel diamond MOSFETsare demonstrated. The n-type diamond MOSFETs exhibit a high field-effectmobility around 150 cm2 V−1 s−1 at 573 K, which is the highest among all then-channel MOSFETs based on wide-bandgap semiconductors. This workenables the development of energy-efficient and high-reliability CMOSintegrated circuits for high-power electronics, integrated spintronics, andextreme sensors under harsh environments.1. IntroductionModern electronics is prevailed by silicon complementarymetal-oxide-semiconductor (CMOS) technology. Nevertheless,silicon CMOS has been facing bottlenecks in the conditionof high-power density, high frequency, high temperature, andhigh radiation. Diamond is regarded as the ultimate semi-conductor because of its superior characteristics compared toother semiconductors.[1] Diamond CMOS devices have longM. Liao, H. Sun, S. KoizumiResearch Center for Electronic and Optical MaterialsNational Institute for Materials Science (NIMS)1-1 Namiki, Tsukuba, Ibaraki 3050044, JapanE-mail: meiyong.liao@nims.go.jp; Koizumi.Satoshi@nims.go.jpH. SunBeijing Academy of Quantum Information SciencesNo. 10 East Xibeiwang Road, Haidian, Beijing 100193, ChinaThe ORCID identification number(s) for the author(s) of this articlecan be found under https://doi.org/10.1002/advs.202306013© 2023 The Authors. Advanced Science published by Wiley-VCH GmbH.This is an open access article under the terms of the Creative CommonsAttribution License, which permits use, distribution and reproduction inany medium, provided the original work is properly cited.DOI: 10.1002/advs.202306013been pursued to achieve performances be-yond the capability of conventional sili-con electronics. By using diamond elec-tronics, not only the thermal manage-ment demands for conventional semicon-ductors be alleviated but also these de-vices are more energy efficient and canendure much higher breakdown voltagesand harsh environments. On the otherhand, with the development of diamondgrowth technologies,[2] power electronics,[3]spintronics,[4] and microelectromechanicalsystem (MEMS) sensors[5] operatable un-der high-temperature and strong-radiationconditions, the demand for peripheral cir-cuitry based on diamond CMOS deviceshas increased for monolithic integration.[6]P-type diamonds are readily accessiblethrough bulk boron doping or surface trans-fer doping of a hydrogen-terminated di-amond surface.[7] Nevertheless, in orderto realize diamond CMOS, symmetricaldoping control has to be achieved, as those accomplished forsemiconductor silicon. Therefore, the development of diamondn-MOS is in demand.However, n-channel diamond MOSFETs have long been anobstacle and have not been achieved yet due to the signifi-cant challenge in the growth of electronic grade high-qualityn-type diamond. Until now, phosphorus has been recognizedas the only reliable shallowest n-type dopant at room tempera-ture, despite the large covalent radius of P (1.08 Å) comparedto that of C (0.77 Å) and high equilibrium formation energy (4–5.7 eV).[8] However, due to the large carrier compensation ratioin phosphorus-doped diamond, it has been difficult to achieven-type conductivity for low donor concentration of ≈1017 cm−3,hindering the development of n-channel MOSFET. In additionto the defects induced by the larger radius of phosphorous thancarbon, the incorporation of a large amount of hydrogen intothe diamond epilayer during chemical vapor deposition (CVD)also passivates the phosphorous atoms and reduces the electricalconductivity.In this study, electronic grade n-type diamond with an atom-ically flat terrace was achieved based on the step-flow lateralgrowth mode. N-type diamond with low donor concentrationof ≈1017 cm−3 is thus achieved without observing hoppingconductivity. Consequently, n-type diamond MOSFETs that canoperate at 573 K have been successfully developed. The ex-perimental field-effect electron mobility at 573 K was aroundAdv. Sci. 2024, 11, 2306013 © 2023 The Authors. Advanced Science published by Wiley-VCH GmbH2306013 (1 of 8)http://www.advancedscience.commailto:meiyong.liao@nims.go.jpmailto:Koizumi.Satoshi@nims.go.jphttps://doi.org/10.1002/advs.202306013http://creativecommons.org/licenses/by/4.0/http://creativecommons.org/licenses/by/4.0/http://crossmark.crossref.org/dialog/?doi=10.1002%2Fadvs.202306013&domain=pdf&date_stamp=2024-01-19www.advancedsciencenews.com www.advancedscience.comFigure 1. High-quality lightly phosphorus-doped n-type diamond epilayer. A) Schematic of the atomic steps on the miscut diamond (111) substate (top)and the grown phosphorous-doped epilayer with hydrogen-termination (bottom). B) Surface morphology measured using AFM, showing an atomicallysmooth terrace. The steps are caused by the off angle of the diamond substrate. C) Two-dimensional Raman mapping across the surface of the n−diamond epilayer. The variation in the diamond feature peak centered at 1332.5 cm−1 is within 0.135 cm−1, demonstrating little stress in the diamondepilayer. D) Raman mapping in depth from the epilayer to diamond substrate. The full-width at the half maximum of the epilayer is 1.75 cm−1, as low asthose of high crystal quality intrinsic single-crystal diamond layers.150 cm2 V−1 s−1, the highest among all the wide-bandgap semi-conductors at high temperatures.2. Results and Discussion2.1. High-Quality Phosphorus-Doped Diamond EpilayerWe grew a phosphorus-doped diamond epilayer via microwaveplasma chemical vapor deposition (MPCVD) on a type-Ib (111)oriented high-pressure high-temperature (HPHT) diamondsubstrate. The n-type diamond contains two phosphorus-dopedepilayers: a lightly phosphorus-doped n− diamond epilayer forthe device channel and a heavily phosphorus-doped diamondepilayer for the Ohmic contact. The 600-nm-thick lightly dopedn− -layer diamond epilayer was grown directly on the HPHTdiamond substrate. Following that, a 100-nm-thick heavilyphosphorus-doped n+ – layer was deposited on the n−-layerusing a homemade MPCVD reactor, which enhanced the in-corporation efficiency of phosphorus into the diamond epilayer.As grown diamond (111) has a unreconstructed monohydride-terminated surface.[9] The homoepitaxial growth of the n−-typediamond on the diamond (111) substrate follows the step-flowgrowth mode. Atomically flat terraces are formed (Figure 1A), asobserved by atomic force microscopy (AFM), shown in Figure 1B;Figure S1 (Supporting Information) with an average roughness(Ra) ≈0.1 nm. The average roughness of the terrace is ˂ 1 nm fora larger area of 10 × 10 μm2 (Figure S2, Supporting Information),despite the formation of steps in the entire epilayer. The terracewidth is hundreds of nanometers, and the step height is ≈3 nm(Figure S3, Supporting Information). The surface steps arecaused by the miscut of the HPHT diamond (111) substrate. Thestep-flow growth mode resulted in a high-quality n− diamond epi-layer. Raman mapping reveals that the feature peak of diamondexhibits little dispersion within 0.135 cm−1 and the full-widthat the half maximum (FWHM) of the diamond peak of the n−diamond epilayer is centered at 1.75 cm−1, better than that of theHPHT diamond substrate of 1.95 cm−1 (Figure 1C,D). The stressin the n− layer is as low as -12 MPa[10] and the crystal quality iscomparable to those of homoepitaxial diamond layers grown on(100) diamond substrates.[11] The lateral distribution of the phos-phorus concentration in the CVD diamond epilayer was uniformif the compressive stress is assumed to be caused primarily bythe incorporation of phosphorus atoms. The phosphorus con-centrations of n+/n− diamond on the diamond substrate weremeasured using secondary ion mass spectrometry (SIMS), asshown in Figure S4 (Supporting Information). The 100-nm-thickn+ layer has a phosphorus concentration of ≈1020 cm−3. The600-nm-thick lightly doped n− -layer diamond epilayer has aphosphorus concentration of ND ≈1017 cm−3. A uniform distri-bution of phosphorus concentration along the growth directioncould be observed in the SIMS data. Additionally, the SIMS depthprofile shows that the hydrogen content is controlled at a noiselevel of 1017 cm−3. The well-controlled incorporation of phos-phorus and hydrogen atoms into the diamond epilayer implies aAdv. Sci. 2024, 11, 2306013 © 2023 The Authors. Advanced Science published by Wiley-VCH GmbH2306013 (2 of 8) 21983844, 2024, 13, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/advs.202306013 by Cochrane Japan, Wiley Online Library on [02/04/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensehttp://www.advancedsciencenews.comhttp://www.advancedscience.comwww.advancedsciencenews.com www.advancedscience.comFigure 2. MOSFETs based on phosphorous doped n-type diamond and the electrical characteristics with temperatures up to 573 K. A) Schematic ofthe MOSFETs. The n+ diamond layer is used to reduce the source and drain contact resistance. The n− diamond layer serves as the channel. B) Opticalimage of the diamond MOSFETs. C) Transistor properties at 300, 423, and 573 K. The drain current increases by nearly four orders of magnitude fromroom temperature to 573 K.high crystal quality of the diamond epilayer, which is essential forachieving n-type conductivity. In addition, no nitrogen-vacancyrelated luminescence was detected from the epilayer.The electron concentration strongly depends on the tempera-ture because of the deep nature of phosphorus in diamond. Theelectron concentration is calculated as follows:n(n + NA)ND − NA − n=NCgexp(−EDkBT)(1)where n denotes the free electron concentration in the conduc-tion band, ND denotes the phosphorous concentration, NA indi-cates the compensating acceptor density, NC refers to the effec-tive conduction band density of states, g indicates the degener-ation factor of the donors, ED denotes the activation energy ofthe donors, kB is the Boltzmann constant, and T indicates thetemperature. The electron density is ≈1010 cm−3 at 300 K and in-creased by four orders of magnitude at 573 K for ND ≈1017 cm−3(Figure S5, Supporting Information). The compensating accep-tor concentration NA is ≈2 × 1016 cm−3. At room temperature,the electron mobility measured by the Hall effect is ≈623 cm2 V−1s−1.[12] The lightly doped n−-layer exhibits a high electron mobil-ity of 212 cm2 V−1 s−1, even at 573 K (Figure S6, Supporting In-formation). The resistivity of the lightly doped n− -layer film is≈106 Ω cm at room temperature and decreased to 100 Ω cm at573 K (Figure S7, Supporting Information). The thermal activa-tion energy, ED is ≈0.57 eV.2.2. Electrical Properties of N-Type Diamond MOSFETsWe fabricated n-channel diamond MOSFETs with two types ofgeometries: rectangular and Corbino (Figure 2; Table S1, Sup-porting Information). The source (S) and drain (D) contacts wereformed on the heavily phosphorus-doped n+ layer, which was an-nealed Ti (50 nm)/Pt(10 nm)/Au(60 nm). The electrical resistiv-ity of the heavily doped n+ -diamond is ≈80 Ω cm at RT and20 Ω cm at 573 K.[13] A lightly phosphorus-doped n−-layer wasused as the channel of the MOSFETs. The top heavily doped n+diamond layer between the S and D electrodes was etched in oxy-gen plasma until it reached the lightly doped layer. The gate ox-ide was 30-nm-thick Al2O3 deposited via atomic layer deposition(ALD) at 473 K. The gate metal consisted of a 10-nm-thick Ti layercovered by a 60-nm-thick Au layer. The gate lengths (Lg) are 5and 10 μm, and the source-drain (Lsg) and drain-gate space (Ldg)are 5 and 10 μm, respectively. The inner and outer diameters ofthe gate for the Corbino MOSFETs are 220 and 230 μm, respec-tively. For the rectangular MOSFET (device No. 1) studied here,Adv. Sci. 2024, 11, 2306013 © 2023 The Authors. Advanced Science published by Wiley-VCH GmbH2306013 (3 of 8) 21983844, 2024, 13, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/advs.202306013 by Cochrane Japan, Wiley Online Library on [02/04/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensehttp://www.advancedsciencenews.comhttp://www.advancedscience.comwww.advancedsciencenews.com www.advancedscience.comFigure 3. Transfer properties of the n-channel diamond MOSFET. A) Id versus Vgs characteristics and transconductance at Vds = 15 V and at 300 K. Nohysteresis is observed. B) Id0.5 versus Vgs curve at 300 K. The plot is not a straight line, revealing the series resistance effect. C) Id versus Vgs characteristicsand transconductance at Vds = 15 V and at 573 K. Little hysteresis is observed, while the threshold voltage changes slightly. D) Id0.5 versus Vgs curve at573 K. A nonlinear behavior is observed, revealing that the ideal MOSFET model does not work well.Lg is 5 μm, Lsg = Ldg = 10 μm, and the gate width is ≈900 μm.Figure 2A,B shows schematic and optical images of the n-typediamond MOSFETs, respectively. The electrical characterizationof the MOSFETs was performed in a vacuum chamber (10−3 Pa)using a semiconductor parameter analyzer and a shielded probestation. The temperature of the MOSFETs was increased fromroom temperature to 573 K for electrical characterization.The dependence of the drain current (Id) normalized by thegate width on the drain voltage (Vds) of the rectangular MOSFETis shown in Figure 2C. Here, we show the Id−Vds characteristicsmeasured at three temperatures: 300 K (RT), 423 K (150 °C), and573 K (300 °C). The gate voltage (Vgs) of the MOSFET was var-ied from −20 to 10 V in steps of 5 V. The drain current was wellmodulated by the gate voltage, displaying a typical transistor ac-tion with an n-type channel. The maximum drain current (Id,sat)at Vds = 20 and Vgs = 5 V is ≈0.027 μA mm−1 at 300 K. However,further increasing Vgs > 5 V resulted in little improvement in thedrain current owing to the high series resistance. Temperature-dependent Id−Vds characteristics were obtained until the draincurrent of the MOSFET stabilized over time at a certain tem-perature. As illustrated in Figure 2C(ii),(iii), the drain currentmarkedly increases with the temperature, owing to the thermalionization of phosphorus. At high temperatures and Vds = 20 Vand Vgs = 10 V, the drain current increases to 2.9 μA mm−1 at423 K and 105 μA mm−1 at 573 K, which is two and four orders ofmagnitude higher than that at 300 K, respectively. This is consis-tent with the dependence of electrical resistivity on temperature(Figure S7, Supporting Information). The drain voltage requiredto reach the saturation increases with temperatures and gate volt-age, that is Vds is >30 V for the saturation at 573 K and Vgs = 10 V.The on-resistance is estimated to be ≈5 GΩ mm at RT, whichreduced to 160 kΩ mm at 573 K at Vgs = 10 V. The variationsin the electrical characteristics of the MOSFET at other temper-atures are shown in Figures S8–S12 (Supporting Information).The dependence of the drain current on the measured tempera-ture is presented at different gate voltages (Figure S13, Support-ing Information). The drain current increases exponentially withthe temperature. A fitting using the Arrhenius equation of thetemperature-dependent drain current provides a thermal activa-tion energy of 0.45 eV.The transfer characteristics of the MOSFET or the gate voltage-dependent drain current are shown in Figure 3A at 300 K andFigure 3C at 573 K at Vds = 20 V in the saturation region. Theratio of the drain current at gate voltages of 10 and −20 V is >200 at RT and 100 times at 573 K at Vds = 20 V. Similar to MOS-FETs based on boron-doped diamond, the n-type diamond MOS-FET exhibits a deep depletion mode.[14] Little hysteresis is ob-served in the transfer curves at temperatures below 473 K. Onlyslight hysteresis is observed at 573 K. The maximum transcon-ductance gm is around 0.012 μS mm−1 at 300 K and aroundAdv. Sci. 2024, 11, 2306013 © 2023 The Authors. Advanced Science published by Wiley-VCH GmbH2306013 (4 of 8) 21983844, 2024, 13, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/advs.202306013 by Cochrane Japan, Wiley Online Library on [02/04/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensehttp://www.advancedsciencenews.comhttp://www.advancedscience.comwww.advancedsciencenews.com www.advancedscience.comFigure 4. Experimental and theoretical field-effect electron mobility. A) Threshold voltages (Vth) extracted by the graphic method based on the transfercurves. Vth∼- 25 V changes little with temperature. B) Experimental field-effect mobility as Vgs at 573 K by the saturation model, which is slightly gate-dependent. C) Theoretical field-effect mobility considering the thermal ionization effect of the donor and series resistance. The mobility decreases asthe temperature increases and is comparable to those measured by Hall effect. D) Switching speed at 573 K of the n-type MOSFET. The rising and decaytimes are < 5 μs at Vds = 15 V when the radio-frequency signal amplitude at the gate is 10 V. The switching speed is slower for a smaller gate amplitude,when the radio-frequency signal amplitude applied to the gate is 5 V.4 μS mm−1 at 573 K. The threshold voltages (Vth) were extractedusing the graphic method of Vgs versus Id0.5 (Figure 3B,D), whichis ≈−25 V. There is little change in Vth with the gate-sweepingdirection or temperature (Figure 4A). Other devices with differ-ent geometries were also measured, and their electrical proper-ties are shown in Figures S14–S17 (Supporting Information) andsimilar n-channel behavior was observed. The electrical perfor-mances, such as the maximum saturated drain current, max-imum transconductance, threshold voltage, and temperature-dependent behavior, are comparable with those of MOSFETs withsimilar dimensions (Table S1, Supporting Information).2.3. Modeling the Field-Effect Electron MobilityFor an ideal MOSFET in which the mobility does not depend onthe gate voltage or series resistance, the effective electron mo-bility μeff could be calculated using the quadratic model in thesaturation region as follows:Id, sat =Wg2LgCox𝜇eff(Vgs − Vth)2(2)where Id,stat denotes the drain current in the saturation re-gion and Cox denotes the capacitance of the gate oxide. We at-tempted to determine the field-effect electron mobility usingEquation (2). However, the field-effect mobility is as low as0.02 cm2 V−1 s−1 at 300 K, significantly (almost 3000 timeslower) deviated from the reasonable value measured by Hall mea-surements. Substituting the series resistance into Equation (2)does not cause an essential change in mobility.[1a] An increasein the field-effect electron mobility is observed as the temper-ature increases, which is unreasonable. At 573 K, the electronmobility calculated using Equation (2) is ≈150 cm2 V−1 s−1(Figure 4B), which is much higher than those of n-channelMOSFETs based on SiC, GaN, and Ga2O3[15] at high tempera-tures. Note that the mobility is underestimated even at 573 Kowing to the large series resistances in the source/drain anddrift regions and the partial thermal ionization of phosphorus indiamond.To precisely evaluate the field-effect mobility, we consider thei) thermal ionization efficiency of the phosphorus donor, ii) se-ries resistance, and iii) mobility degradation factors (i.e., defectsscattering). Therefore, in the linear region, the drain current (Id)can be expressed as[16]Id =𝛾WgLg (1 + M)[Vgs − Vth − 𝛼Vd2]Vds (3)Adv. Sci. 2024, 11, 2306013 © 2023 The Authors. Advanced Science published by Wiley-VCH GmbH2306013 (5 of 8) 21983844, 2024, 13, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/advs.202306013 by Cochrane Japan, Wiley Online Library on [02/04/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensehttp://www.advancedsciencenews.comhttp://www.advancedscience.comwww.advancedsciencenews.com www.advancedscience.comwhere M denotes the donor occupancy factor, a ratio of bounddonor charge to channel charge that reflects the ionization rateof the donor and is related to the quasi Femi level of electrons.Here, we assume that M is independent of the channel depth.Note that M has the analytical form different from the ratio offree electron density to doping density (Supporting Information).The larger M is, the smaller the ratio of the free electron den-sity to doping density is. 𝛼 is the factor lowering the drain cur-rent related to the donor concentration, which is ≈1.1 here. 𝛾includes the factors of 𝜃 and 𝜂 that modulate the mobility (Sup-porting Information). The factor 𝜃 is related to conventional car-riers scattering and the effect of series resistance. The effect ofthe drain voltage on the carrier mobility is connected to the pa-rameter 𝜂 included in 𝛾 . The none zero 𝜂 is mostly due to theirregularity in the nanoscale/microscale mesa structure due tooxygen etching. The electron mobility was simulated in a regionwell above the threshold voltage. The saturation of the carrier ve-locity is not considered because of the small drain voltage, largedistance between the source and drain, and large gate length.The thermal ionization of phosphorous in diamond was set at0.57 eV for the simulation. We obtained the field-effect mobil-ity of the n-type MOSFET at a gate voltage of 0 V, as shown inFigure 4C. The mobility was simulated to be ≈638 cm2 V−1 s−1at 300 K, which decreased to ≈200 cm2 V−1 s−1 at 573 K by con-sidering the donor occupancy factor M and series resistance. Foran ideal MOSFET, M decreases with increasing current and ulti-mately reaches zero. M was calculated as 2278 at 300 K, which de-creases to ≈4 at 573 K (Figure S18, Supporting Information), re-vealing the n-type diamond MOSFET depletion mode. It shouldbe noted that the compensating acceptor effect was not consid-ered. The simulated characteristics of the drain voltage versusdrain current are displayed in the SM (Figure S19, SupportingInformation) by considering the donor occupancy factor and se-ries resistance. A slight discrepancy exists in the low drain volt-age region, mostly owing to the barrier between the n+ and n−-layers in the S and D electrodes. We note that the simulation wasconducted by assuming the entire n− – layer conductive. Consid-ering the Femi-level pining of oxygen-terminated phosphorous-doped n-type (111) diamond[17], subsurface depletion of the chan-nel occurs. The simulation from a metal-Schottky FET by using asimilar n−-channel diamond layer revealed that the sub-depletionlayer was ≈50 nm. For the n-type MOSFET, the Femi-level piningalong the fixed charges in the insulator modifies the Femi poten-tial in the simulation. Detailed experimental and theoretical in-vestigation should be conducted to disclose the effect of defectsstates in the future.Currently, p-channel diamond MOSFETs have been exten-sively developed and a routine fabrication process has been es-tablished. Owing to the lack of diamond n-MOSs, a complemen-tary circuit has been reported to be accomplished using diamondp-MOSs and III-nitride n-MOSs.[18] Although this is a promis-ing strategy, all-diamond CMOS is the ultimate pursuit to fullyexploit the figure-of-merit of diamond, particularly for electron-ics that operate under harsh environments (high temperaturesand strong radiation). For high-frequency operation, comparedwith H-terminated transistors with a cutoff frequency of overGHz,[1d] the series resistance is still large for n-type diamondMOSFETs, which is over 109 Ωmm−1 at room temperature. Thus,the operating speed was limited to the kilohertz range. Neverthe-less, at temperatures > 573 K, the series resistance decreases byover three orders of magnitude. The switching speed is ˂ 5 μs(Figure 4D), which could also be tuned by the signal applied tothe gate. The switching speed is faster for a larger gate ampli-tude due to the increase in the channel conductivity. By opti-mizing the device geometries, such as the reduction of the driftregion space and gate length, the operation frequency can ex-ceed the megahertz range, comfortably satisfying the require-ments of mixed-signal circuits for radiation detectors and MEMSsensors.[5a,19] In addition, n-type diamonds can stabilize the neg-atively charged nitrogen-vacancy (NV−) state, greatly improvingsensitivity. Thus, diamond CMOS-integrated NV centers are fa-vorable for the development of diamond spin electronics that re-quire dedicated controllability and integrity to scale up the quan-tum sensing protocol.[20] The deep nature of the phosphorus indiamond benefits the generation of surface p-type conductivity ina lightly phosphorus-doped diamond epilayer with hydrogen ter-mination. Thus, a diamond CMOS based on a planar process onlightly doped n-type diamond can be achieved. By using MEMStechnology[21] to engineer the band structure,[22] the performanceof n-type diamond MOSFETs can be further improved. This studysheds light on monolithically integrated diamond chips, in whichelectronics, spintronics, and sensors are based on diamond.3. ConclusionIn conclusion, n-type channel diamond MOSFETs were demon-strated on phosphorus-doped homoepitaxal (111) diamond epi-layer. The n-type (111) diamond epilayer was grown based ona step-flow nucleation mode, enabling the precise control ofthe crystal quality and the donor distribution. The n-MOSFETshowed a high mobility ≈150 cm2 V−1 s−1 at 573 K, a significantfeature over other wide-bandgap semiconductors at high temper-atures. The excellent high-temperature performance offers theroute to develop diamond CMOS circuits for high-power elec-tronics, integrated spintronics, and extreme sensors under harshenvironments.4. Experimental SectionGrowth of Phosphorous Doped N-type Diamond: The phosphorus-doped diamond epilayers were grown by using a microwave plasma-assisted chemical vapor deposition (MPCVD) on a type-Ib (111) high-pressure high-temperature (HPHT) diamond substrate with a 3° misorien-tation. The n-type diamond contained two phosphorus-doped epilayers: alightly doped diamond epilayer for the device channel and a heavily dopeddiamond epilayer for the Ohmic contact. The lightly doped n−-diamondepilayer was directly grown on the HPHT diamond substrate. The gas pres-sure, microwave power, and substrate temperature were 100 Torr, 500 W,and 920 °C, respectively. The heavily phosphorus-doped n+-diamond epi-layer was grown by using a homemade MPCVD reactor to enhance theincorporation efficiency of phosphorus into diamond. The methane con-centration was 0.05%. The phosphorus to carbon ratio was 10 000 ppm forthe heavily phosphorus-doped diamond epilayer. The growth duration was15 min. The impurity levels of the lightly and heavily phosphorus-dopeddiamond were ≈1017 and 1020 cm−3, respectively, which were measuredby secondary ion mass spectroscopy (SIMS). The thickness of the n− –layer and n+ – layer was 600 and 100 nm, respectively.Raman Spectroscopy Imaging: Confocal Raman imaging was con-ducted on the n− diamond epilayer by using a WITec 𝛼−300R spec-troscopy. The wavelength and power of the excitation laser were 532 nmAdv. Sci. 2024, 11, 2306013 © 2023 The Authors. Advanced Science published by Wiley-VCH GmbH2306013 (6 of 8) 21983844, 2024, 13, Downloaded from https://onlinelibrary.wiley.com/doi/10.1002/advs.202306013 by Cochrane Japan, Wiley Online Library on [02/04/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons Licensehttp://www.advancedsciencenews.comhttp://www.advancedscience.comwww.advancedsciencenews.com www.advancedscience.comand 20 mW, respectively. The spectrometer was equipped with a1800 Lmm−1 monochromator grating and a cooled charge coupled de-vice detector. All measurements were taken at room temperature using abackscattering geometry. The crystal axis of diamond with z = [001], x =[010], and y = [100] directions is set to be the coordinate of X–Y–Z for thesample stage. The electric field of the incident beam is along the x = [010]direction of diamond. The wavenumber was first calibrated by using natu-ral type-IIa single-crystal diamond before recording the Raman spectra ofthe n− diamond epilayer. The peak position of the first-order diamond linewas set as 1332.5 cm−1 for the type-IIa diamond. To achieve a high spa-tial resolution, the objective lens with a ×50 magnification was adopted.The numerical aperture of the lens was 0.75. According to the Rayleighcriterion, the lateral spatial resolution was 0.43 μm. The depth resolutionwas ≈2 μm. However, the actual resolution can be much smaller based onthe statistical analysis. A thicker lightly phosphorous-doped diamond epi-layer grown by the same conditions was used for the Raman spectroscopymeasuremnts.Fabrication of N-Type Diamond MOSFETs: Two kinds of geometries:circular and rectangular shapes were adopted (Table S1, Supporting In-formation). The n-type diamond epilayer was boiled in an acid mixtureof HNO3 and H2SO4 to remove the surface contaminations and oxi-dize the diamond surface. The n-type diamond MOSFETs were fabricatedthrough a lithography process. First, source (S) and drain (D) contactsTi (50 nm)/Pt(10 nm)/Au(60 nm) were formed on the n+ diamond layerby using an electron beam deposition and annealed at 773 K for 30 minin a high vacuum chamber. Second, the top heavily doped n+ diamondlayer between the S and D electrodes was etched in an oxygen plasma un-til reaching the lightly doped one. The S and D electrodes were used asthe mask for the reactive ion etching without an additional photolithogra-phy. The RIE conditions were: an oxygen flow rate of 90 sccm, a rf powerof 800 W, and a bias of 20 W. The etching rate was ≈50 nm min−1. Then,a 30 nm-thick Al2O3 was deposited by atomic layer deposition (ALD) at473 K as the gate oxide on the patterned parts between the S and D elec-trodes. The gate metal was a 10 nm-thick Ti layer covered by a 60 nm-thickAu layer.Electrical Characterization: The current–voltage (I–V) characteristicsof the n-type diamond MESFET were measured by using a semiconductorparameter analyzer (Keithley 2602B) and a three-probe station. The sourceis grounded, and no bias is applied to the back of the type-Ib diamond sub-strate. The gate leakage was simultaneously recorded while measuring theMOSFETs properties. The measurements were conducted under a vacuumchamber. The temperature of the sample was elevated from room tem-perature to 573 K. The temperature-dependent electrical properties wererecorded until stable currents were obtained.Supporting InformationSupporting Information is available from the Wiley Online Library or fromthe author.AcknowledgementsThis work was supported by Council for Science, Technology and Inno-vation(CSTI), Cross-ministerial Strategic Innovation Promotion Program(SIP), ministerial Strategic Innovation Promotion Program (SIP), the 3rdperiod of SIP “Ultimate Diamond” (Funding agency:NIMS), JSPS KAK-ENHI (Nos. 20H02212, 22K18957, and 15H03999), and Advanced Re-search Infrastructure for Materials and Nanotechnology in Japan (ARIM,No. JPMXP1223NM5297) sponsored by the Ministry of Education, Cul-ture, Sports, and Technology (MEXT) of Japan.Conflict of InterestThe authors declare no conflict of interest.Data Availability StatementThe data that support the findings of this study are available from the cor-responding author upon reasonable request.KeywordsMOSFET, n-type conductivity, semiconductor diamondReceived: August 24, 2023Revised: October 22, 2023Published online: January 19, 2024[1] a) Y. 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