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Gyuho Myeong, Wongil Shin, Kyunghwan Sung, Seungho Kim, Hongsik Lim, Boram Kim, Taehyeok Jin, Jihoon Park, Taehun Lee, Michael S. Fuhrer, [Kenji Watanabe](https://orcid.org/0000-0003-3701-8119), [Takashi Taniguchi](https://orcid.org/0000-0002-1467-3105), Fei Liu, Sungjae Cho

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[Dirac-source diode with sub-unity ideality factor](https://mdr.nims.go.jp/datasets/5b854649-daa4-4646-bab1-3f8311787bf1)

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Dirac-source diode with sub-unity ideality factorARTICLEDirac-source diode with sub-unity ideality factorGyuho Myeong 1,6, Wongil Shin1,6, Kyunghwan Sung1, Seungho Kim1, Hongsik Lim1, Boram Kim1, Taehyeok Jin1,Jihoon Park1, Taehun Lee1, Michael S. Fuhrer 2, Kenji Watanabe 3, Takashi Taniguchi 3, Fei Liu 4,5✉ &Sungjae Cho 1✉An increase in power consumption necessitates a low-power circuit technology to extendMoore’s law. Low-power transistors, such as tunnel field-effect transistors (TFETs), negative-capacitance field-effect transistors (NC-FETs), and Dirac-source field-effect transistors (DS-FETs), have been realised to break the thermionic limit of the subthreshold swing (SS).However, a low-power rectifier, able to overcome the thermionic limit of an ideality factor (η)of 1 at room temperature, has not been proposed yet. In this study, we have realised a DSdiode based on graphene/MoS2/graphite van der Waals heterostructures, which exhibits asteep-slope characteristic curve, by exploiting the linear density of states (DOSs) of gra-phene. For the developed DS diode, we obtained η < 1 for more than four decades of draincurrent (ηave_4dec < 1) with a minimum value of 0.8, and a rectifying ratio exceeding 108. Therealisation of a DS diode represents an additional step towards the development of low-power electronic circuits.https://doi.org/10.1038/s41467-022-31849-5 OPEN1 Department of Physics, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea. 2 ARC Centre of Excellence in Future Low-EnergyElectronics Technologies, and School of Physics and Astronomy, Monash University, Clayton, Victoria 3800, Australia. 3 National Institute for MaterialsScience, Namiki, Tsukuba, Ibaraki 305-0044, Japan. 4 School of Integrated Circuits, Peking University, Beijing 100871, China. 5 Beijing AdvancedInnovation Center for Integrated Circuits, Beijing 100871, China. 6These authors contributed equally: Gyuho Myeong, Wongil Shin, Kyunghwan Sung.✉email: feiliu@pku.edu.cn; sungjae.cho@kaist.ac.krNATURE COMMUNICATIONS |         (2022) 13:4328 | https://doi.org/10.1038/s41467-022-31849-5 | www.nature.com/naturecommunications 11234567890():,;http://crossmark.crossref.org/dialog/?doi=10.1038/s41467-022-31849-5&domain=pdfhttp://crossmark.crossref.org/dialog/?doi=10.1038/s41467-022-31849-5&domain=pdfhttp://crossmark.crossref.org/dialog/?doi=10.1038/s41467-022-31849-5&domain=pdfhttp://crossmark.crossref.org/dialog/?doi=10.1038/s41467-022-31849-5&domain=pdfhttp://orcid.org/0000-0003-0969-2907http://orcid.org/0000-0003-0969-2907http://orcid.org/0000-0003-0969-2907http://orcid.org/0000-0003-0969-2907http://orcid.org/0000-0003-0969-2907http://orcid.org/0000-0001-6183-2773http://orcid.org/0000-0001-6183-2773http://orcid.org/0000-0001-6183-2773http://orcid.org/0000-0001-6183-2773http://orcid.org/0000-0001-6183-2773http://orcid.org/0000-0003-3701-8119http://orcid.org/0000-0003-3701-8119http://orcid.org/0000-0003-3701-8119http://orcid.org/0000-0003-3701-8119http://orcid.org/0000-0003-3701-8119http://orcid.org/0000-0002-1467-3105http://orcid.org/0000-0002-1467-3105http://orcid.org/0000-0002-1467-3105http://orcid.org/0000-0002-1467-3105http://orcid.org/0000-0002-1467-3105http://orcid.org/0000-0003-3212-7594http://orcid.org/0000-0003-3212-7594http://orcid.org/0000-0003-3212-7594http://orcid.org/0000-0003-3212-7594http://orcid.org/0000-0003-3212-7594http://orcid.org/0000-0003-2547-095Xhttp://orcid.org/0000-0003-2547-095Xhttp://orcid.org/0000-0003-2547-095Xhttp://orcid.org/0000-0003-2547-095Xhttp://orcid.org/0000-0003-2547-095Xmailto:feiliu@pku.edu.cnmailto:sungjae.cho@kaist.ac.krwww.nature.com/naturecommunicationswww.nature.com/naturecommunicationsPower consumption of integrated digital devices sets the ulti-mate limit to downscaling and Moore’s Law1. Reducing powerconsumption has been thwarted by fundamental limits on theoperating voltage set by thermionic emission2. For an ideal ther-mionic device, the dependence of current I on voltage V is expressedthrough the subthreshold swing SS= [dlog10(I)/dV]−1= (kBT/q)log(10) ≈60mV/dec at room temperature, where kBT is the thermalenergy and q is the elemental charge.Two-dimensional (2D) van der Waals (vdW) materials3,4 havebeen proposed for various schemes to overcome the thermioniclimit (SS= 60 mV/dec) of metal-oxide-semiconductor field-effecttransistors (MOSFETs) in nonconventional transistors such asTFETs, NC-FETs, and DS-FETs5–14. In particular, DS-FETs usethe linear energy dispersion relationship of graphene, producing asuper-exponential change in the DOS with energy15. As a result,DS-FETs have achieved a smaller SS than that of a MOSFET, witha large drive current11–14.Integration of heterogeneous electronic components on a singlelow-power-consumption platform is highly desirable to enableapplications such as the Internet of Things (IoT). Schottky diodesare important electronic components with low operation voltageand high current16, and have many useful applications such asrectifiers, mixers, selectors, switches, photodetectors and solarcells16. Although there has been considerable development oflow-power transistors, steep-slope diode (or triode) rectifiers thatovercome the thermionic limit (η < 1) of conventional diodeshave not been proposed yet, but will be necessary for deviceintegration with low-power transistors. Herein, we propose a DSdiode as an essential element for low-power circuits. The DSinjects cold electrons without a long thermal tail above thepotential barrier in the channel (Supplementary Figure 1). OurDS diode consists of a graphene/MoS2/graphite heterojunction,where graphene acts as a cold electron injector, whereas thegraphite/MoS2 interface provides a Schottky barrier for rectifi-cation. The MoS2 channel was chosen because of its high-gatetunability and mobility17. The minimum and average values of ηfor the DS diode are 0.78 and less than 1 over more than fourdecades of current at room temperature (ηave_4dec < 1), respec-tively, with a high rectifying ratio (>108).ResultsCharacteristics of Dirac-source diode. The DS diode device(Fig. 1a, b) consists of four components: (i) an n-type monolayerMoS2 channel (Supplementary Fig. 3), (ii) a graphene DS neutral ata zero gate voltage, (iii) a graphite drain-contact to form a Schottkybarrier between the graphite and monolayer MoS2 for electricalrectification with a bias voltage, and (iv) metal (back, top, andcontrol) gate electrodes to tune the Fermi levels of 2D materials.Two-dimensional van der Waals epitaxy was performed inside anAr-filled glovebox until the heterostructure was encapsulated byhexagonal boron nitride (hBN) to avoid any contaminationthrough air exposure or chemicals (Supplementary Fig. 2). Unlikea metal contact, a graphite contact with the monolayer MoS2 formsa non-reactive clean interface18 (Supplementary Fig. 4). Cr/Auelectrodes were placed only in the region where graphite or gra-phene encapsulated by hBN exists.The diode has a local top-gate, control-gate and a globalback-gate. The top gate only modulates the channel of themonolayer MoS2 band while the control-gate tunes the regionsof the monolayer MoS2 channel and part of graphene overlappedwith MoS2, respectively. The global back-gate affects thegraphene/MoS2/graphite heterostructure. The gate-dependentelectrical measurements (Supplementary Fig. 5) indicate that theDirac point of hBN-encapsulated graphene is located atVBG=+1.9 V.Figure 1c presents the characteristic drain current (ID) versusbias voltage (Vbias) curve for the DS diode at VBG=−6 V,VCG= 0 V and VTG=−0.7 V. At VBG=−6 V, graphene isp-type. When a bias voltage is applied to the graphene, electronsare injected from the p-type graphene source into the graphitedrain. Note the electrons in the graphene source contributing tothe current injection should have energy above the green dottedline (Fig. 1d) which is determined by the top of the MoS2conduction band edge while not all the electrons above EF ingraphene contribute to the current. The injected current densityfrom graphene is given by:J Eð Þ / M0 E � ED����f ðE � EFSÞWhere ED is the Dirac point and EFS is the Fermi level ofgraphene. So, as the channel barrier gets lower than the Diracpoint, availible density of states from graphene around E= Etop(Etop is the top of channel barrier) increases due to M0 E � ED����.So, injected current increased super-exponentially and the deviceworks as a DS-FET. The electrical measurements reveal a nearlyOhmic graphene/MoS2 contact and a Schottky barrier of thegraphite/MoS2 contact (Supplementary Fig. 6). When a negativeback-gate voltage is applied, the Schottky barrier height increasesand the device current is mainly modulated by the Schottkybarrier at the interface between the graphite and monolayerMoS2. Although the Ohmic contact behaviour between grapheneand monolayer MoS2 was observed in electrical measurements, tofully understand the band diagram at the graphene/monolayerMoS2 interface and its gate dependence, further studies areneeded.The performance of a Schottky diode is mainly characterisedby two figures of merit. One is the rectifying ratio, which refers tothe ratio between the on and off currents ðR ¼ IonIoffÞ, whereas theother is η, which is the slope representing the change in draincurrent with a bias voltage and can be obtained from thefollowing Schottky diode equation:ID ¼ IS 1� eqVbias=ηkBT� �; ð1Þwhere q is the elementary charge, Vbias is the applied bias voltage,η is the ideality factor, kB is the Boltzmann constant, T is thetemperature, and ID and IS are the drain and leakage currents,respectively. Equation (1) corresponds to SS= (ηkBT/e)log(10)hence values η < 1 correspond to SS below the thermionic limit.The characteristic curve at a negative gate voltage in Fig. 1bexhibits rectification behaviour with η < 1 observed over morethan four decades of drain current, a minimum η of 0.78, and alarge rectifying ratio (>108).Steep-slope switching mechanism of Dirac-source diode. Toexplore the switching mechanism of the DS diode, we developedan analytical formula for the ideality factor and performednumerical device simulations (Supplementary Note 6). Both thetwo methods show that the ideality factor less than 1 is obtainedin the DS diode due to the linear density of states of graphene.The switching slope of a diode is determined by the energy-dependent current density injected from an electrode, which isrelated to DOS and the distribution function. Graphene has alinear energy-dependent electronic DOS near the Dirac point,which is different from conventional metals with a constant DOSaround the Fermi level. Therefore, the thermal tail of the Boltz-mann distribution function is suppressed by the Dirac pointtuned to the off-state region by doping. Namely, as the biasvoltage is decreased on the graphene electrode as shown inFig. 1d, the part of current density related to the distributionfunction is increased exponentially similar to conventionalARTICLE NATURE COMMUNICATIONS | https://doi.org/10.1038/s41467-022-31849-52 NATURE COMMUNICATIONS |         (2022) 13:4328 | https://doi.org/10.1038/s41467-022-31849-5 | www.nature.com/naturecommunicationswww.nature.com/naturecommunicationsmetals, which results in the ideal factor limit of 1. While, theinjected DOS over the top of the channel barrier is also increasedlinearly from off-state to on-state, as shown in Fig. 1d. Therefore,the current is increased super-exponentially and the ideal factorbelow 1 is obtained in the diode with graphene electrode as theinjection source.Therefore, the switching slope of a diode, i.e. η < 1, is obtained inthe diode with a graphene electrode as the cold electron injectionsource because of the linear DOS of the DS. Detailed simulationresults are presented in Supplementary Fig. 7. Quantum transportsimulations show that the DS diode has promising deviceperformance. The ideality factor as small as 0.69 is obtained inthe simulated DS diode and is less than 1 in more than five decadesof current at room temperature.The on-state current is larger than 103 μA/μm and therectifying ratio is over 107.Properties of asymmetric graphene/MoS2 and graphite/MoS2contacts. Figure 2a presents the ID-Vbias characteristic curve of theDS diode at different back-gate voltages. For the DS diode to workas a diode, an asymmetric Schottky barrier height between thesource and drain is necessary19–22. To satisfy this condition, weplaced asymmetric graphene and graphite contacts with themonolayer MoS2 channel with gates. Without gate modulation,graphene has a work function of 4.3–4.7 eV from a monolayer to afew layers23–25. Because the work function of graphene (~4.3 eV)does not differ significantly from the electron affinity of MoS2(~4.2 eV)26–29, the Schottky barrier height at the graphene/MoS2interface is negligible, compared to the Schottky barrier height atthe graphite/MoS2 interface. This also indicates that the Dirac pointof pristine graphene is located near the conduction band edge ofMoS2. As shown in Supplementary Fig. 10, in case of the metal/n-type semiconductor junction, the positive voltage on metal becameforward bias. In our case, we applied bias voltage on the grapheneside, and negative bias became forward bias, i.e., positive bias on thegraphite side is forward bias, which indicates the Schottky barrierbetween the graphite/MoS2 junction is dominated in our device.Supplementary Fig. 6 indicates that the graphene/MoS2 deviceshows an almost Ohmic IV curve, whereas graphite/MoS2 does notshow an Ohmic IV curve at room temperature. Figure 2a showsthat as the gate voltage decreases, the rectification behaviourFig. 1 Device structure, characteristic curve, and band diagram of DS diode. a Optical image of graphene/MoS2/graphite heterojunction diode. Grey, red,and black dashed lines indicate graphite, monolayer MoS2, and graphene, respectively. We used graphene as a source and graphite as a drain. The top-gate(TG) and control-gate(CG) were placed for gate modulation of the MoS2 channel and graphene/MoS2 overlapped region, respectively. Scale bar, 5 um.b Schematic image of graphene/MoS2/graphite heterojunction diode. c Characteristic drain current(ID)-bias voltage(Vbias) curve in our device, whichexhibits ideality factor(η)= 0.78 in 1 decade of current and an average η < 1 in more than four decades of current, i.e., ηave_4dec < 1. The rectifying ratio ofour device is larger than 108. d Band diagram of DS Schottky diode, which explains the working principle of cold electron injection from graphene. EDirac,DOS, EFS, and EFD indicate Energy at the Dirac point, the density of states, Fermi level at the source side, and Fermi level at the drain side, respectively. Bluedashed line and green arrows indicate MoS2 energy window level and expression of rapid increment of current flow.NATURE COMMUNICATIONS | https://doi.org/10.1038/s41467-022-31849-5 ARTICLENATURE COMMUNICATIONS |         (2022) 13:4328 | https://doi.org/10.1038/s41467-022-31849-5 | www.nature.com/naturecommunications 3www.nature.com/naturecommunicationswww.nature.com/naturecommunicationsbecomes dominant at negative gate voltages. As the back-gatevoltage exceeds VBG > 0, non-diode ID-Vbias characteristic curvesappear.To clarify the origin of the gate-dependent modulation ofthe ID-Vbias characteristic curves, we measured the modulation ofthe Schottky barrier height with back-gate voltages from theactivation energy in the reverse bias regime. The Schottky diodeequation (Eq. 1) can be rewritten asID ¼ AA�Tαe�qΦB=kBT 1� eqVbiasηkBT� �; ð2Þwhere A is the area of the Schottky junction, A* is the Richardsonconstant, α= 3/2 is an exponent for a two-dimensional semi-conducting system30, kB is the Boltzmann constant, q is theelementary charge, T is the temperature and ΦB is the Schottkybarrier height. When a large negative bias in absolute value isapplied, i.e. eqVbias=kBT ≈0, the saturated drain current is propor-tional to T3=2e�qΦB=kBT . The inset of Supplementary Fig. 11a showsa plot of ln(Isat/T3/2) versus 1/kBT in the reverse bias saturationregime (Vbias = +1 V). We extract ΦB for a given VBG from theslope of each curve. Supplementary Fig. 11a shows the Schottkybarrier height obtained from the slope of each curve in the inset ofSupplementary Fig. 11a. As shown in Supplementary Fig. 11b, inthe highly positive VBG regime, the device shows an almost linearID-Vbias curve, exhibiting nearly Ohmic contact behaviour(negligible Schottky barriers on both sides of the contacts, grapheneand graphite with MoS2).Dirac-source field-effect transistor measurement. To prove thatthe proposed diode is operated via cold carrier injection from agraphene DS at negative back-gate voltages, we measured the SS todetermine if it showed sub-thermionic values. SupplementaryFig. 12b shows the characteristic ID versus control-gate voltage(VCG) transfer curve under the working conditions of the DS-FET,i.e. VBG < 0 V, where the graphene is p-type. When we applyVBG=−3 V, graphene slightly p-type. When the control-gate isplaced on the MoS2 channel and the graphene/MoS2 overlappedregion is swept from the off-state to the on-state, the DOS of thegraphene increases according to the band diagram presented inSupplementary Fig. 12a, thereby operating as a DS-FET. As shownin Supplementary Fig. 12b, the SSave_1dec and SSave_3dec exhibits53.6 and 58.75mV/dec, respectively, which indicates that theproposed diode acts as a DS-FET owing to the linear energy dis-persion relationship of the graphene-source electrode, resulting in asuper-exponential change in the DOS. Both DS-FET and DS diodehave the same origin for SS < 60mV/dec and η < 1.Steep-slope diode curves in the p-doped graphene region.Figure 3 shows the ID-Vbias characteristic curve in the steep-slopediode regime at VBG=−6 to −2 V in 2 V step with fixed top- andcontrol- gate voltages (VTG=−0.7 V and VCG= 0 V), where thegraphene is p-doped. In the measured regime, where the top ofthe Schottky barrier is located below the Dirac point of graphene,η of the device is less than 1 in more than four decades of currentowing to the cold charge injection from the DS at a forward bias(Vbias < 0). The minimum η that we measured in one decade ofcurrent is 0.78. The red dotted line in Fig. 3 is an ideal diode curve(η= 1) in the forward bias direction. The DS diodes in thesegate voltage regions show rectification ratios exceeding 108at VBG=−6 V (>106 when VBG=−2 V and >107 whenVBG=−4 V). We note that the device leakage current level islimited by the leakage currents (~10 fA) from the measurementequipment. Therefore, the reverse bias leakage current level fromthe diode should be lower than the measured values.DiscussionIn conclusion, we successfully demonstrated the DS diode thatoperates based on cold charge injection from a graphene sourceowing to the linear DOS and a Schottky barrier at the interfacebetween graphite and monolayer MoS2. As the linear DOS of theinjected charges from p-type graphene over the top of the Schottkybarrier between graphite and n-type monolayer MoS2 increaseslinearly from reverse to forward bias, an ideal factor below 1 isobtained in the diode with a graphene electrode as the injectionsource. Using gate modulation of the Schottky barrier height of thegraphite/MoS2 junction, gradual switching between the diode andnon-diode behaviours was also observed. The fabricated DS diodepresents a minimum η as low as 0.78 in one decade of current, and itremains less than 1 for more than four decades of current at roomtemperature (ηave_4dec < 1), with a high rectifying ratio exceeding 108.Additionally, the device shows SS < 60mV/dec for the same origin asthat for η < 1. By using CVD-grown MoS2, graphene and graphite,Fig. 2 Characteristic ID-Vbias curve for various VBG and its band diagram. a Characteristic ID-Vbias curve in the range of VBG=−10 to +60V. As VBGdecreases, change from non-diode to diode behaviour is observed. b Band diagram when VBG < 0 (diode regime). Owing to the larger work function ofgraphite than that of graphene, the device becomes a graphite/MoS2-interface Schottky barrier-dominant Schottky diode. c Band diagram when VBG > 0(non-diode regime). As VBG increases, the work function of graphite decreases, and the Schottky barrier height of the graphite/MoS2 interface decreases.ARTICLE NATURE COMMUNICATIONS | https://doi.org/10.1038/s41467-022-31849-54 NATURE COMMUNICATIONS |         (2022) 13:4328 | https://doi.org/10.1038/s41467-022-31849-5 | www.nature.com/naturecommunicationswww.nature.com/naturecommunicationsintegrated circuits using steep-slope DS-FETs and DS diodes can befabricated in a large scale and pave the way for energy-efficientcircuit technology.MethodsDevice fabrication. Supplementary Fig. 2 illustrates the fabrication of the Dirac-source (DS) Schottky diode. As can be seen, the first step involves the preparationof a polydimethylsiloxane (PDMS) stamp covered with a polycarbonate (PC) filmon a glass slide. Subsequently, MoS2 flakes are mechanically exfoliated on a Si/SiO2wafer. In this study, the MoS2 exfoliation was performed in an Ar-filled glovebox toprevent contamination. Using the standard dry-transfer method, each flake ispicked up in the order—top hexagonal boron nitride (hBN), graphite, graphene,MoS2, and bottom hBN. After fabrication of the PC film and confirming sufficientadherence of the prepared flakes, the wafer was slowly heated to 90 °C, duringwhich time, the sliding glass is slowly raised. During the pick-up process, owing tothe large area of the top hBN, graphene, graphite, and MoS2 do not directly touchthe PC film. After fabrication of the heterostructure on the PC film, the latter isslowly placed onto a prepared 285-nm-thick Si/SiO2 wafer. Subsequently, the waferis heated to 180 °C, thereby melting the PC film. Thereafter, the PC film is suc-cessively washed using chloroform, acetone, and isopropyl alcohol (IPA). Aftertransfer of the heterojunction to a new wafer, the device is exposed to chemicals toerase the released PC film. However, graphene, graphite, and MoS2 layers areencapsulated within large areas of the top and bottom hBN layers, which thechemicals cannot percolate. After fabricating the heterostructure on a 285-nm Si/SiO2 wafer, the standard e-beam lithography and plasma etching procedures areperformed via e-beam deposition (Cr/Au= 5/60 nm) to place electrical contacts inthe graphene and graphite layers. One-dimensional edge contact on graphene wasformed in this process31. The hBN and graphite layers are etched using CF4/O2 andAr/O2, respectively. Additional e-beam lithography and deposition processes areperformed to facilitate top- and control-gate placement.Measurement. Supplementary Fig. 13 depicts the measurement protocol of the DSdiode. Using the Keithley 6430, bias voltage was applied to the graphene electrodeand measured the drain current from the graphite electrode. Keithley 2400 wasused to apply a gate voltage to the Si back-gate electrode (VBG) and two Yokogawa7651 were used to apply gate voltages to the top- and control-gate electrodes (VTGand VCG, respectively). Measurements were performed in a vacuum probe stationwith tri-axial cables to reduce leakage current from the measurement setup.Data availabilityRelevant data supporting the key findings of this study are available within the article andthe Supplementary Information file. All raw data generated during the current study areavailable from the corresponding authors upon request. Source data are provided withthis paper.Received: 22 October 2021; Accepted: 5 July 2022;References1. Mack, C. A. Fifty years of Moore’s law. IEEE Trans. Semicond. Manuf. 24,202–207 (2011).2. Szkopek, T. et al. Suspended graphene electromechanical switches for energyefficient electronics. Prog. Quantum Electron. 76, 100315 (2021).3. Liu, Y. et al. Van der Waals heterostructures and devices. Nat. Rev. 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Dirac-source field-effect transistors as energy-efficient, high-performance electronic switches. Science 361, 387–392 (2018).12. Xiao, M. et al. n-type Dirac-source field-effect transistors based on a graphene/carbon nanotube heterojunction. Adv. Electron. Mater. 6, 2000258 (2020).13. Tang, Z. et al. A steep-slope MoS2/graphene Dirac-source field-effecttransistor with a large drive current. Nano Lett. 21, 1758–1764 (2021).14. Liu, M. et al. Two-dimensional cold electron transport for steep-slopetransistors. ACS Nano 15, 5762–5772 (2021).15. Wallace, P. R. The band theory of graphite. Phys. Rev. 71, 622–634 (1947).16. Di Bartolomeo, A. Graphene Schottky diodes: an experimental review of therectifying graphene/semiconductor heterojunction. Phys. Rep. 606, 1 (2016).17. Radisavljevic, B. et al. Single-layer MoS2 transistors. Nat. Nanotechnol. 6,147–150 (2011).18. Liu, Y. et al. Approaching the Schottky-Mott limit in van der Waals metal-semiconductor junctions. Nature 557, 696–700 (2018).19. LaGasse, S. W. et al. Gate-tunable graphene-WSe2 heterojunctions at theSchottky-Mott limit. Adv. Mater. 31, 1901392 (2019).20. Chiquito, A. J. et al. Back-to-back Schottky diodes: the generalization of thediode theory in analysis and extraction of electrical parameters of nanodevices.J. Phys. Condens. Matter 24, 225303 (2012).21. Jaiswal, H. N. et al. Diode-like selective enhancement of carrier transportthrough a metal-semiconductor interface decorated by monolayer boronnitride. Adv. Mater. 32, 2002716 (2020).22. Wang, Z. et al. Extraction and analysis of the characteristic parameters inback-to-back connected asymmetric Schottky diode. Phys. Status Solidi A 217,1901018 (2020).23. Rut’kov, E. V., Afanas’eva, E. Y. & Gall, N. R. Graphene and graphite workfunction depending on layer number on Re. Diam. Relat. Mater. 101, 107576(2020).24. Yan, R. et al. Determination of graphene work function and graphene-insulator-semiconductor band alignment by internal photoemissionspectroscopy. Appl. Phys. Lett. 101, 022105 (2012).25. Yu, Y. J. et al. Tuning the graphene work function by electric field effect. NanoLett. 9, 3430–3434 (2009).26. Kang, J., Tongay, S., Zhou, J., Li, J. B. & Wu, J. Q. Band offsets andheterostructures of two-dimensional semiconductors. Appl. Phys. Lett. 102,012111 (2013).Fig. 3 Slopes of DS Schottky diode versus ideal diode and recorded ideality factor in 2D vdW material-based diode. Comparison of slopes between theDS Schottky diode and an ideal diode. Black and red dotted data represent those of the DS Schottky diode and an ideal diode, respectively. The Greendashed line indicates off-state current in the reverse bias regime. a DS Schottky diode curve at VBG=−2 V. b DS Schottky diode curve at VBG=−4 V. c DSSchottky diode curve at VBG=−6 V. The DS Schottky diode exhibits a ηave_3dec of 0.98, 0.95, 0.94 when VBG=−2, −4, and −6 V, respectively with fixedtop- and control- gate voltage of VTG=−0.7 V and VCG= 0 V.NATURE COMMUNICATIONS | https://doi.org/10.1038/s41467-022-31849-5 ARTICLENATURE COMMUNICATIONS |         (2022) 13:4328 | https://doi.org/10.1038/s41467-022-31849-5 | www.nature.com/naturecommunications 5www.nature.com/naturecommunicationswww.nature.com/naturecommunications27. Liang, Y., Huang, S., Soklaski, R. & Yang, L. Quasiparticle band-edge energyand band offsets of monolayer of molybdenum and tungsten chalcogenides.Appl. Phys. Lett. 103, 042106 (2013).28. Hughes, H. P. & Starnberg, H. I. Electron Spectroscopies Applied to Low-Dimensional Materials (Springer, 2000).29. Gong, C. et al. Band alignment of two-dimensional transition metaldichalcogenides: application in tunnel field effect transistors. Appl. Phys. Lett.103, 053513 (2013).30. Chen, J. R. et al. Control of Schottky barriers in single layer MoS2 transistorswith ferromagnetic contacts. Nano Lett. 13, 3106–3110 (2013).31. Wang, L. et al. One-dimensional electrical contact to a two-dimensionalmaterial. Science 342, 614–617 (2013).AcknowledgementsWe thank J. Lee for the helpful discussions. S.C. acknowledges support from Korea NRF(Grant Nos. 2020M3F3A2A01081899, and 2020R1A2C2100258). F.L. acknowledgessupport from NSFC (Grant No. 61974003) and the 111 Project (Grant No. B18001).M.S.F. acknowledge support from the ARC (CE17010039).Author contributionsS.C. conceived and supervised the project. G.M., W.S. and K.S. fabricated devices andperformed measurements. K.W., and T.T. grew high-quality hBN single crystals. S.K.,J.P., K.S., H.L., B.K., T.J., and T.L. assisted high-temperature transport measurements.F.L. developed the theoretical model and performed device simulations. S.C., G.M., W.S.,M.S.F., and F.L. analyzed the data. S.C., and G.M. wrote the manuscript. All the authorscontribute to editing the manuscript.Competing interestsThe authors declare no competing interests.Additional informationSupplementary information The online version contains supplementary materialavailable at https://doi.org/10.1038/s41467-022-31849-5.Correspondence and requests for materials should be addressed to Fei Liu or SungjaeCho.Peer review information Nature Communications thanks Xinran Wang and the other,anonymous, reviewer(s) for their contribution to the peer review of this work. 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To view a copy of this license, visit http://creativecommons.org/licenses/by/4.0/.© The Author(s) 2022ARTICLE NATURE COMMUNICATIONS | https://doi.org/10.1038/s41467-022-31849-56 NATURE COMMUNICATIONS |         (2022) 13:4328 | https://doi.org/10.1038/s41467-022-31849-5 | www.nature.com/naturecommunicationshttps://doi.org/10.1038/s41467-022-31849-5http://www.nature.com/reprintshttp://creativecommons.org/licenses/by/4.0/http://creativecommons.org/licenses/by/4.0/www.nature.com/naturecommunications Dirac-source diode with sub-unity ideality factor Results Characteristics of Dirac-source diode Steep-slope switching mechanism of Dirac-source diode Properties of asymmetric graphene/MoS2 and graphite/MoS2 contacts Dirac-source field-effect transistor measurement Steep-slope diode curves in the p-nobreakdoped graphene region Discussion Methods Device fabrication Measurement Data availability References References Acknowledgements Author contributions Competing interests Additional information