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[liu abstract2.pdf](https://mdr.nims.go.jp/filesets/9aaa5353-4f44-42f2-9bd5-f97b64e59dcd/download)

## Creator

[Jiangwei Liu](https://orcid.org/0000-0003-2580-7401), Hirotaka Ohsato, [Bo Da](https://orcid.org/0000-0002-0785-8662), [Yasuo Koide](https://orcid.org/0000-0001-8321-9822)

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[In Copyright](http://rightsstatements.org/vocab/InC/1.0/)

## Other metadata

[Diamond Metal-Oxide-Semiconductor Field-effect Transistors on a Large-area Wafer](https://mdr.nims.go.jp/datasets/1f29ae72-efe9-4c27-96a6-7ae50ac8a1f7)

## Fulltext

Paper Title (use style: paper title)XXX-X-XXXX-XXXX-X/XX/$XX.00 ©20XX IEEE Diamond Metal-Oxide-Semiconductor Field-effect Transistors on a Large-area Wafer Jiangwei Liu Research Center for Electronic and Optical Materials  National Institute for Materials Science Tsukuba, Japan liu.jiangwei@nims.go.jp  Yasuo Koide Research Center for Electronic and Optical Materials  National Institute for Materials Science Tsukuba, Japan Koide.yasuo@nims.go.jp  Hirotaka Ohsato, Research Network and Facility Services Division National Institute for Materials Science Tsukuba, Japan Oosato.hirotaka@nims.go.jp   Bo Da, Center for Basic Research on Materials National Institute for Materials Science Tsukuba, Japan Da.bo@nims.go.jp    Abstract—Diamond is promising for high-power, high-frequency, and high-temperature applications. By now, most of diamond metal-oxide-semiconductor field-effect transistors (MOSFETs) are fabricated on small-area diamond wafers (3 × 3 mm2). In order to push forward the diamond electronic devices for future practical application, it is necessary to investigate the electrical properties of them on the large-area wafers. In this study, we fabricate planar-type and T-type hydrogen-terminated diamond MOSFETs on a large-area wafer (8 × 8 mm2). Electrical properties of them are investigated and discussed. Keywords—Diamond, MOSFET, large-area wafer, T-type I. INTRODUCTION  It is well-known that diamond has been studied for applications in high-temperature, high-power, and high-frequency electronic devices because of its wide band gap energy, high breakdown field, high carrier mobility, and large thermal conductivity [1].  Development of diamond-based electronic devices has been limited by the low free carrier densities at room temperature due to the high activation energies of boron (370 meV) and phosphorus (570 meV) dopants. Fortunately, p-type hydrogen-terminated diamond (H-diamond) channel layer can accumulate two-dimensional hole gases on the surface with sheet hole density of 1012~1013 cm-2. Notably, after exposing the H-diamond in the NO2 ambient or annealing in the NH3 + H2 ambient [2, 3], its hole density can be increased to be as high as 1014 cm-2. Therefore, the H-diamond is believed to be a promising channel layer for fabricating high-performance diamond electronic devices, such as metal-oxide-semiconductor field-effect transistors (MOSFETs).  In the previous studies [4-9], most of the H-diamond MOSFETs were fabricated on small-area diamond wafers with size of 3 × 3 mm2. They showed excellent electrical properties with high output current, large extrinsic transconductance, and high breakdown voltage. Recently, the 3-inch single-crystalline diamond wafer has been grown in laboratory successfully [10]. Further, the 0.5-inch wafer has been commercially available. Therefore, it is assumed that the diamond-based MOSFET power devices can be used in our common lives in the near future.  In order to push forward the diamond electronic devices for practical application, it is necessary to investigate the electrical properties of them on the large-area wafer. In this study, we fabricate the planar-type and T-type diamond MOSFETs on a large-area wafer (8 × 8 mm2). Electrical properties of them are investigated and discussed. II. EXPERIMENTAL Figure 1 shows fabrication process for the H-diamond MOSFETs. An Ib-type diamond (100) substrate with a dimension of 8 × 8 × 0.3 mm3 was cleaned in the H2SO4+HNO3 acid solution at 300 ºC for 3 hours [Fig. 1(a)]. The H-diamond homoepitaxial layer was grown via a microwave plasma-enhanced chemical vapor deposition system [Fig. 1(b)]. The H2 and CH4 flow rates were 500 and 0.5 sccm, respectively. The deposition temperature, chamber pressure, and growth time for the H-diamond epitaxial layer were 900~940 ºC, 80 Torr, and 1.5 h, respectively. Thickness was around 150 nm. Mesa-structure was formed by etching the H-diamond in an O2 ambient using a capacitively-coupled plasma reactive ion etching system [Fig. 1(c)]. The O2 flow rate, chamber pressure, source power, and etching time were 100 sccm, 10 Pa, 50 W, and 90 s, respectively. Source/drain Ohmic contact electrodes of Pd/Ti/Au with thickness of 10/20/200 nm were formed using an electron-gun evaporation system [Fig. 1(d)]. Oxide insulators of Al2O3/HfSiO2 bilayer were deposited by atomic layer deposition (ALD) and sputtering deposition (SD) techniques, respectively [Fig. 1(e)]. The ALD-Al2O3 with a thickness of 4.0 nm contacted with the H-diamond directly. It impacts as a buffer layer to protect the hydrogen surface from damaged by the plasma discharge during the SD-HfSiO2 deposition. The high dielectric constant SD-HfSiO2 oxide insulator was employed to response the high hole density at a small gate voltage. Gate contact electrodes of Ti/Au (10/200 nm) were formed via the electron-gun evaporation system. Electrical properties for the H-diamond MOSFETs were measured with a four-probe system at room temperature.  Fig. 1 Fabrication process for the H-diamond MOSFETs: (a) Cleaned diamond substrate, (b) H-diamond epitaxial layer growth, (c) mesa-structure formation, (d) Ohmic contact formation, and (e) Gate metal and gate contact formation. (a) (b) (e)(d)(c)Diamond substrateH-diamondMesa structure Ohmic contactGate oxide and gate contacthttps://samurai.nims.go.jp/profiles?unit=wb000https://samurai.nims.go.jp/profiles?unit=wb000mailto:liu.jiangwei@nims.go.jphttps://samurai.nims.go.jp/profiles?unit=wb000https://samurai.nims.go.jp/profiles?unit=wb000https://samurai.nims.go.jp/profiles?unit=wi000https://samurai.nims.go.jp/profiles?unit=wi000mailto:Oosato.hirotaka@nims.go.jphttps://samurai.nims.go.jp/profiles?unit=wg000III. RESULTS AND DISCUSSION A. Surface Morpholoy and Schematic Diagram  Figures 2(a), 2(b), and 2(c) show top views for the entire H-diamond MOSFETs, one planar-type MOSFET, and one T-type MOSFET, respectively. There are 720 H-diamond MOSFETs on the wafer. Gate width (WG) for all of them is the same as 100 μm. Figs. 2(d) and 2(e) show schematic diagrams for the planar-type and T-type MOSFETs, respectively.  For the planar-type H-diamond MOSFETs, there are interspaces between source/drain and gate electrodes with the distances of 3.5 μm. The gate length (LG) increases from 3.0 μm to 31.0 μm. For the T-type H-diamond MOSFETs, there are no interspaces between source/drain and gate electrodes. Therefore, on-resistance (RON) of the T-type H-diamond MOSFET is lower than that of the planar-type one with the same LG. B. Electrical properties for the H-diamond MOSFETs Figures 3(a) and 3(b) show drain current (ID) as functions of drain voltage (VD) for the planar-type and T-type H-diamond MOSFETs, respectively. The LG for both of them is the same as 3.0 μm. The ID is normalized by the WG of 100 μm. The measurement gate-to-source voltage (VGS) is increased from −20.0 V to 10.0 V in steps of +1.0 V.  Both planar-type and T-type MOSFETs show p-type characteristics and distinct pinch-off behaviors. The maximum ID (ID,max) values for the planar-type and T-type MOSFETs are −0.8 and −3.0 mA/mm, respectively. At VGS = −20.0 V, the RON for the planar-type H- diamond MOSFET is 1.2 × 104 Ω mm, which is three times larger than that of the T-type MOSFET of 3.0 × 103 Ω mm. There are three kinds of resistances for the RON of planar-type H-diamond MOSFET, which are Pd/Ti/Au Ohmic contact resistance, channel resistance under oxide insulator, and the H-diamond surface resistance at the interspaces between source/drain and gate electrodes. Since the surface resistance for the T-type H-diamond MOSFET do not exist, it demonstrates smaller RON and larger ID,max. Figure 4(a) and 4(b) summarize the ID,max and RON as a function of the LG for the planar-type H-diamond MOSFETs. With the LG increasing from 3.0 μm to 31.0 μm, the ID,max has a decrease tendency and the RON has a increase tendency. The increase of the LG indicates the enhancement of the channel resistance for the H-diamond MOSFETs, which leads to the variation of the ID,max and RON. IV. CONCLUSIONS In this study, we have fabricated the planar-type and T-type H-diamond MOSFETs on a large-area diamond wafer and investigated their electrical properties. This study is an initial stage to push forward the development of diamond MOSFETs for future practical applications. REFERENCES [1] C. J. H. Wort and R. S Balmer, “Diamond as an electronic material,” Mater. Today, vol. 11, pp. 22–28, Jan./Feb. 2008. [2] H. Sato and M. Kasu, “Maximum hole concentration for hydrogen-terminated diamond surfaces with various surface orientations obtained by exposure to highly concentrated NO2,” Diam. Relat. Mater., vol. 31, pp. 47-49, Jan. 2013.  [3] M. Imura, K. Nakajima, M. Liao, and Y. Koide, “Growth mechanism of c-axis-oriented AlN on (111) diamond substrates by metal-organic vapor phase epitaxy,” J. Cryst. Growth, vol. 312, pp. 1325-1328, Apr. 2010. Fig. 3.  (a) and (b) Drain current as functions of drain voltage  for the planar-type and T-type H-diamond MOSFETs, respectively. 0 -5 -10 -15 -200.0-0.2-0.4-0.6-0.8    0 -5 -10 -15 -200-1-2-3    Drain voltage (V)Drain current (mA/mm)(a) Planar-type MOSFETVG: –20.0 ~ 10.0 VStep: +1.0 VLG: 3.0 μm(b) T-type MOSFETVG: –20.0 ~ 10.0 VStep: +1.0 VLG: 3.0 μmDrain voltage (V)0 5 10 15 20 25 30 35103104105106    0 5 10 15 20 25 30 350.0-0.2-0.4-0.6-0.8-1.0    Current maximum (mA/mm)Gate length (μm) Gate length (μm)On-resistance (mA/mm)(a) (b)Fig. 4.  (a) and (b) Current maximum and on-resistance as a function of gate length for the planar-type H-diamond MOSFETs, respectively.  Fig. 2.  (a), (b), and (c) Top views for the entire H-diamond MOSFETs, one planar-type MOSFET, and one T-type MOSFET, respectively. (d) and (e) Schematic diagrams for the planar-type and T-type MOSFETs, respectively. 2 mm(a)(b) (c)50 μm 50 μmH-diamond epitaxial layerDiamond (100) wafer(e)GateSource Drain(d)H-diamond epitaxial layerDiamond (100) waferGateSource DrainGateSource DrainGateSource DrainOxide insulator[4] J. Liu, M. Liao, M. Imura, and Y. Koide, “Normally-off HfO2-gated diamond field effect transistors,” Appl. Phys. Lett., vol. 103, no. 9, pp. 092905-1–092905-4, Aug. 2013. [5] J. Liu, M. Liao, M. Imura, A. Tanaka, H. Iwai, and Y. Koide, “Low on-resistance diamond field-effect transistor with high-k ZrO2 as dielectric,” Sci. Rep., vol. 4, p. 6395, Sep. 2014. [6] J. Liu, H. Ohsato, M. Y. Liao, M. Imura, E. Watanabe, and Y. Koide, “Logic circuits with hydrogenated diamond field-effect transistors,” IEEE Electron Dev. Lett., vol. 38, no. 7, pp. 922–925, Jul. 2017, doi: 10.1109/LED.2017.2702744. [7] X. Yu, J. Zhou, C. Qi, Z. Cao, Y. Kong, and T. Chen, “A high frequency H-diamond MISFET with fT/fmax of 70/80 GHz,” IEEE Electron Device Lett., vol. 39, no. 9, pp. 1373–1376, Sep. 2018. [8] J. Liu, H. Oosato, B. Da, T. Teraji, A. Kobayashi, H. Fujioka, and Y. Koide, “Operations of hydrogenated diamond metal–oxide–semiconductor field-effect transistors after annealing at 500 °C,” J. Phys. D: Appl. Phys., vol. 52, no. 31, p. 315104, May 2019. [9] M. Iwataki, N. Oi, K. Horikawa, S. Amano, J. Nishimura, T. Kageura, M. Inaba, A. Hiraiwa, and H. Kawarada, “Over 12000 A/cm2 and 3.2 mΩ cm2 miniaturized vertical-type two-dimensional hole gas diamond MOSFET,” IEEE Elec. Dev. Lett., vol. 41 , pp. 111–114, Jan. 2020. [10] M. Schreck, S. Gsell, R. Brescia, and F. Martin, “Ion bombardment induced buried lateral growth: the key mechanism for the synthesis of single crystal diamond wafers,” Sci. Rep.,  vol. 7, p. 44462, March 2017.