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[Toshihide Nabatame](https://orcid.org/0000-0002-5973-0230), [Yoshihiro Irokawa](https://orcid.org/0000-0002-6531-4356), Tomomi Sawada, Hiromi Miura, Manami Miyamoto, [Takashi Onaya](https://orcid.org/0000-0002-2710-8623), [Yasuo Koide](https://orcid.org/0000-0001-8321-9822), [Kazuhito Tsukagoshi](https://orcid.org/0000-0001-9710-2692)

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[Characteristics of β-Ga2O3/Al2O3/Pt capacitors with a Ga2O3 surface modified using the dummy-SiO2 process](https://mdr.nims.go.jp/datasets/06a4771d-77e7-4d90-987d-22259ba19833)

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Characteristics of β-Ga2O3/Al2O3/Pt Capacitors with a Ga2O3 Surface Modified Using the Dummy-SiO2 ProcessECS Journal of SolidState Science andTechnology     OPEN ACCESSCharacteristics of β-Ga2O3/Al2O3/Pt Capacitorswith a Ga2O3 Surface Modified Using the Dummy-SiO2 ProcessTo cite this article: Toshihide Nabatame et al 2026 ECS J. Solid State Sci. Technol. 15 064005 View the article online for updates and enhancements.You may also likeRacah Parameters and Tanabe-SuganoDiagram Analysis for Mn4+-Activated (Al,Ga)2O3 Quasibinary Phosphor SystemSadao Adachi-Impact of Channel Width on ElectricalCharacteristics for Inversion Mode N-Channel TFT on Polycrystalline Ge bySolid Phase CrystallizationLinyu Huang, Kota Igura, Dong Wang etal.-Synergistic Electrochemical Performanceof CoFe2O4/Polypyrrole CompositeElectrodes for Supercapacitor ApplicationsIsraa A. Najem, Asmaa Adnan Najm,Metin Gencten et al.-This content was downloaded from IP address 144.213.253.16 on 22/06/2026 at 04:05https://doi.org/10.1149/2162-8777/ae7ac0https://iopscience.iop.org/article/10.1149/2162-8777/ae7240https://iopscience.iop.org/article/10.1149/2162-8777/ae7240https://iopscience.iop.org/article/10.1149/2162-8777/ae7240https://iopscience.iop.org/article/10.1149/2162-8777/ae7240https://iopscience.iop.org/article/10.1149/2162-8777/ae7240https://iopscience.iop.org/article/10.1149/2162-8777/ae7240https://iopscience.iop.org/article/10.1149/2162-8777/ae7240https://iopscience.iop.org/article/10.1149/2162-8777/ae79a7https://iopscience.iop.org/article/10.1149/2162-8777/ae79a7https://iopscience.iop.org/article/10.1149/2162-8777/ae79a7https://iopscience.iop.org/article/10.1149/2162-8777/ae79a7https://iopscience.iop.org/article/10.1149/2162-8777/ae7543https://iopscience.iop.org/article/10.1149/2162-8777/ae7543https://iopscience.iop.org/article/10.1149/2162-8777/ae7543https://iopscience.iop.org/article/10.1149/2162-8777/ae7543https://iopscience.iop.org/article/10.1149/2162-8777/ae7543https://pagead2.googlesyndication.com/pcs/click?xai=AKAOjsuITHkdJqzZOYLPP8J-CdSUeIgE8dOQlH5a8c1yNWT-0Cf7U3q8yfqlNzC7nQEuqhnLblOpjsSbPEWIuFswiVDsTo5LPjbVJ9HsVQUlMzZUdgAjI2iEpSFnOkQWyrkUQzn6WtiDXvpBXyOeDv5q17wF_-EN-fIcC0bxjPRn9xcKHbReUzzONLuTtuIKTqJaDlRfk0Lq63xOEnm32OI8ZLKpSzdDOQ2suGEpjTsyPSExzo2JmQVCw-yTD41ssxxBZIvbeGEYkb3fF0NMxW690nRggZ6gdEGxzapm8yRzvvdPMb5TJd7pdbSnN-jyXvAX8-y4BxaOCPnquRFegP-HmjcKL35bkp_1LP2X3y6eiJ3ekrtVDq-CODvxrzKUhA&sig=Cg0ArKJSzJEq00Tr4tBI&fbs_aeid=%5Bgw_fbsaeid%5D&adurl=https://www.el-cell.com/products/test-cells/force-test-cells/pat-cell-solid/%3Fmtm_campaign%3DIOP-banner%26mtm_kwd%3DPAT-Cell-Solid%26mtm_source%3Dbanner%26mtm_cid%3D2026Characteristics of β-Ga2O3/Al2O3/Pt Capacitors with a Ga2O3Surface Modified Using the Dummy-SiO2 ProcessToshihide Nabatame,z m Yoshihiro Irokawa,z m Tomomi Sawada, m Hiromi Miura, mManami Miyamoto, m Takashi Onaya, m Yasuo Koide, m and Kazuhito Tsukagoshi mNational Institute for Materials Science, Ibaraki 305-0047, JapanThe characteristics of β-Ga2O3/Al2O3/Pt capacitors fabricated via the dummy-SiO2 (d-SiO2) process at 800 °C under O2 (D-O2),N2 (D-N2), and 3% H2 (D-H2) atmospheres were investigated. The surface of Ga2O3 after the d-SiO2 process was as smooth as thatafter the sulfuric acid-hydrogen peroxide mixture treatment (Control). The flatband voltage (Vfb) hysteresis decreased as follows:Control (0.76 V) > D-H2 (0.56 V) > D-N2 (0.43 V) > D-O2 (0.37 V). The interface state density of the D-O2 capacitor wassignificantly reduced to 6 × 1011 cm−2eV−1 at −0.4 eV from conduction band. The Vfb shift caused by the electron traps accordingto the near-interface trap model under positive bias stress substantially improved for the capacitors fabricated by the d-SiO2 process.The poor characteristics of the Control capacitor are due to the presence of the unstable layer on the Ga2O3 surface. The improvedelectrical characteristic of the d-SiO2 capacitors is due to the modified Ga2O3 surface, which eliminated the unstable Ga2O3 layer.This is the result of hydrogen contained within the dummy SiO2 layer supporting the removal of Ga2O3. The difference in thedecomposition reaction of Ga2O3 due to the atmosphere gas of the d-SiO2 process leads to differences in electrical properties.© 2026 The Author(s). Published on behalf of The Electrochemical Society by IOP Publishing Limited. This is an open accessarticle distributed under the terms of the Creative Commons Attribution 4.0 License (CC BY, https://creativecommons.org/licenses/by/4.0/), which permits unrestricted reuse of the work in any medium, provided the original work is properly cited. [DOI: 10.1149/2162-8777/ae7ac0]Manuscript submitted November 30, 2025; revised manuscript received May 13, 2026. Published June 18, 2026.The most stable gallium oxide (Ga2O3) phase, β-Ga2O3, is anultra-wide-bandgap semiconductor for next-generation high-powertransistors. β-Ga2O3 metal-oxide-semiconductor field-effect transis-tors (MOSFETs)1,2 have been widely investigated because β-Ga2O3has a large bandgap of 4.9 eV3–5 and a high breakdown electric fieldof 8 MV cm−1.1 In addition, large single-crystal β-Ga2O3 wafers canbe fabricated by melt growth methods including the floating zone6and Czochralski techniques7 as well as edge-defined film-fedgrowth,8,9 which gives β-Ga2O3 an economic advantage over GaNand SiC.For MOSFETs, various materials such as SiO2,2,10–14 Al2O3,15–20HfO2,21–25 and Al2O3/HfO2 bilayers26 have been investigated as gateinsulators. Among these, Al2O3 is considered a promising candidatematerial for low-temperature fabrication processes, whereas SiO2 isconsidered a candidate material for high-temperature fabrication pro-cesses. Understanding the characteristics of the β-Ga2O3/insulatorinterface for β-Ga2O3 MOSFETs is important. An abnormal flatbandvoltage (Vfb) shift and Vfb hysteresis occur in β-Ga2O3/insulator MOScapacitors because the insulator and an unstable layer on the β-Ga2O3surface had oxygen vacancies (Vo) and electrical defects.12–14,16,27 Toreduce the concentration of these electrical defects, researchers haveinvestigated the effects of post-deposition annealing (PDA) and post-metallization annealing (PMA).17,20 PDA at temperatures as high as1000 °C under an N2 and/or O2 atmosphere have been reported to reducethe density of interface traps (Dit) at the Ga2O3/SiO2 interface.13,14 Forβ-Ga2O3/Al2O3 MOS capacitors, the β-Ga2O3/Al2O3 interface wasimproved by either PDA at 500 °C20 or by PMA at 500 °C.17 We havepreviously reported that the combination of PDA and PMA at 300 °Csubstantially reduced the fixed charge and Dit at the β-Ga2O3/Al2O3interface.28,29 PDA was observed to result in the diffusion of Ga fromthe Ga2O3 substrate into the Al2O3 insulator. This diffusion may affectthe electrical properties of the Al2O3 insulator. Therefore, it is importantto improve the properties of the Ga2O3/insulator without using PDA.Wet processes at temperatures less than 200 °C have generallybeen used to clean Ga2O3 surfaces; however, these cleaningprocesses have not always been effective. Other effective processesfor modifying the Ga2O3 surface are required. We previouslyreported that using a dummy-SiO2 (d-SiO2) process can modify theGaN substrate with epi-like grown unstable GaOx surface, resultingin improved electrical properties.30,31 After modification to removeunstable GaOx and form stable GaOx on the GaN surface via ad-SiO2 process, we fabricated an Al2O3 insulator and Pt gateelectrode at a low temperature (300 °C), thereby suppressing reac-tions at the GaN/modified GaOx/Al2O3 interface. We also observedby scanning transmission electron microscopy with energy-disper-sive X-ray spectroscopy (STEM-EDS) analysis that oxygen-orientedstable Ga2O3 formed on the GaN surface fabricated by a d-SiO2process.32 The d-SiO2 process is also considered effectively formodifying the unstable Ga2O3 layer of Ga2O3 surface.In the present study, we modified from the unstable layer whichhad some electrical defects to stable layer on the β-Ga2O3 surfaceusing a d-SiO2 process under various atmospheres and investigatedthe effect of the process on the electrical properties ofβ-Ga2O3/Al2O3/Pt MOS capacitors.ExperimentalFigure 1 shows the β-Ga2O3/Al2O3/Pt MOS capacitor fabricationflow using a d-SiO2 process. Initially, n+-β-Ga2O3 (3.7 ×1018 cm−3) (001) substrates with a 5 μm-thick Si-doped n-β-Ga2O3epilayer (2.0 × 1016 cm−3) were cleaned with a sulfuric acid–-peroxide mixture (SPM) (H2SO4:H2O2 = 1:1) to remove organicresidues. Four different processes were applied to the samples inparallel. In the d-SiO2 process, a 5 nm-thick SiO2 layer wasdeposited onto β-Ga2O3 substrates via plasma-enhanced atomiclayer deposition (PE-ALD) at 300 °C using tris(dimethylamino)silane as a precursor and O2 as the plasma gas. PDA was carriedout at 800 °C for 300 s under O2, N2, and 3% H2 atmospheres in arapid thermal annealing system; the resultant samples are referred toas D-O2, D-N2, and D-H2, respectively. With an etching rate of0.55 nm s−1, the SiO2 layer was removed in 20 s using buffered HF(BHF) solution. Immediately after these four procedures, a 10 nm-thick Al2O3 film was deposited as a gate insulator onto the β-Ga2O3via ALD at 300 °C using trimethylaluminum (TMA) as a precursorand H2O gas. Finally, to fabricate MOS capacitors, a 100 nm-thick Ptgate electrode was deposited onto the Al2O3 insulator through ashadow mask (~100 μm in diameter) via electron beam evaporation;a Ti (20 nm)/Pt (100 nm) ohmic contact was subsequently depositedonto the backside of the n+-β-Ga2O3 substrates. PMA was carriedout at 300 °C for 300 s under a N2 atmosphere. As reference, aβ-Ga2O3/Al2O3/Pt MOS capacitor was prepared without the d-SiO2process; this capacitor is referred to as “Control.” To study cleaningmethod on β-Ga2O3 surface, β-Ga2O3/Al2O3(30 nm)/Pt capacitorsafter SPM and BHF treatments were also prepared. A 18 nm-thickSiO2 film was deposited onto the β-Ga2O3 substrate via PE-ALD atzE-mail: Nabatame.Toshihide@nims.go.jp; Irokawa.Yoshihiro@nims.go.jpECS Journal of Solid State Science and Technology, 2026 15 064005 aaahttps://orcid.org/0000-0002-5973-0230https://orcid.org/0000-0002-6531-4356https://orcid.org/0000-0002-2335-4480https://orcid.org/0009-0005-4618-8736https://orcid.org/0009-0000-8395-9484https://orcid.org/0000-0002-2710-8623https://orcid.org/0000-0001-8321-9822https://orcid.org/0000-0001-9710-2692https://creativecommons.org/licenses/by/4.0/https://creativecommons.org/licenses/by/4.0/https://doi.org/10.1149/2162-8777/ae7ac0https://doi.org/10.1149/2162-8777/ae7ac0mailto:Nabatame.Toshihide@nims.go.jpmailto:Irokawa.Yoshihiro@nims.go.jphttps://crossmark.crossref.org/dialog/?doi=10.1149/2162-8777/ae7ac0&domain=pdf&date_stamp=2026-06-18300 °C to evaluate the Ga and H concentrations in the SiO2 layerafter PDA.For the fabricated β-Ga2O3/Al2O3/Pt MOS capacitors,capacitance–voltage (C–V) measurements were performed at roomtemperature with a frequency of 1 MHz under dark conditions usingan Agilent B 1500 A semiconductor device parameter analyzer. Thegate bias was swept from the depletion to the accumulation regionand back to the depletion region. The number of repeat voltagesweeps was five. The Vfb value for each specimen was estimatedfrom the C–V data using the MIRAI-ACCEPT software,33 which is aC–V simulation program that considers surface potential and oxidevoltage. The Dit was estimated using a conductance method.34 Anequivalent parallel conductance (Gp/ω) in depletion bias condition iscalculated, where ω is frequency. The frequency varied from 1 kHzto 1 MHz while the V − Vfb voltage applied 1.0 V.28,29 Positive-biasstress (PBS) tests were conducted at room temperature for a stresstime of 300 s by systematically varying the bias V − Vfb from 2.0 to4.0 V. After stress times of 1, 10, 50, 100, 150, 250, and 300 s, theC–V characteristics were repeatedly measured. The direction ofvoltage sweeping for the C–V measurements after PBS was fromaccumulation to depletion to avoid electron emission from traps. Inaddition, the surfaces of the Ga2O3 substrates after sulfuric acid-hydrogen peroxide mixture (SPM) cleaning treatment and the d-SiO2process were characterized by atomic force microscopy (AFM)before an Al2O3 insulator was deposited. The Ga and H depthprofiles in the SiO2 films were evaluated using secondary-ion massspectrometry (SIMS).ResultsWe used AFM to evaluate the surface of the Ga2O3 substratesafter the SPM treatment and the d-SiO2 process (Fig. 2). The rootmean square (RMS) surface roughness of the SPM-treated specimenwas 0.24 nm over a 1.0 × 1.0 μm2 field of view. The RMS of thesample subjected to d-SiO2 was 0.25 nm, suggesting that the d-SiO2process did not lead to increased surface roughness. After the d-SiO2process, no Si diffusion occurred into Ga2O3 via analysis of theSIMS Si depth profile and XPS Ga3d spectra (results not shown). Toestablish a cleaning method for β-Ga2O3 surfaces, SPM and BHFtreatment after SPM were performed. Figure 3 shows Vfb hysteresisand RMS-RMS(SPM) values as a function of the BHF treatmenttime. The etching rate of the β-Ga2O3 substrate found to be0.03 nm min−1 using BHF solution. RMS value after BHF treatmentat 1 min significantly increased by 0.25 nm compared to the SPMand maintained same value, thereafter, indicating that surfaceroughness of the β-Ga2O3 substrate increased using BHF solution.Furthermore, the increase of the surface roughness caused a large Vfbhysteresis of 0.23 V in the capacitor with BHF treatment at 1 mincompared to that (0.08 V) of SPM treatment. The Vfb hysteresisincreased as the BHF treatment time increased. As a result, the SPMtreatment was employed as the surface cleaning method. Figure 4shows the C–V characteristics of the Control, D-O2, D-N2, and D-H2β-Ga2O3/Al2O3/Pt MOS capacitors. For these capacitors, no fre-quency dispersion was observed in the depletion region at lowmeasurement frequencies (1–10 kHz, results not shown). In the firstvoltage sweep after capacitor fabrication, all capacitors showed apositive clockwise C–V hysteresis. In the second measurement fromthe depletion to the accumulation region, the C–V curve shiftedtoward the positive direction for all of the capacitors. Figure 4eshows the Vfb hysteresis as a function of the number of voltagesweeps. At the first voltage sweep, the Vfb hysteresis for the Control,D-H2, D-N2, and D-O2 capacitors were 0.7, 0.56, 0.42, and 0.39 V,respectively. The Vfb hysteresis drastically decreased at the secondvoltage sweep and reached its minimum value at the third voltagesweep. These results indicate the presence of electron trap sites andsuggest that electrons were trapped in these sites during the firstvoltage sweep from the depletion to the accumulation region. Theminimum Vfb hysteresis for the Control, D-H2, D-N2, and D-O2capacitors were 0.12, 0.11, 0.09, and 0.08 V, respectively, at fivevoltage sweeps. We carried out C–V measurements with variousV − Vfb voltage amplitudes of 1.2–4.0 V at 1 MHz. Note that themaximum applied V − Vfb corresponds to 4 MV cm−1. Figure 5shows the Vfb hysteresis as a function of the applied V − Vfb at thefirst voltage sweep. For all of the capacitors, the Vfb hysteresisincreased when V − Vfb increased. The increase in Vfb hysteresis forV − Vfb greater than 2 V is similar to that for GaN/Al2O3 MOScapacitors prepared by the d-SiO2 process.30 In particular, theControl capacitor exhibited a larger Vfb hysteresis than the capacitorsprepared using the d-SiO2 process under various atmospheres, andthe maximum Vfb hysteresis reached 0.76 V. These results suggestthat the trap/detrap sites must be formed at the Ga2O3/Al2O3interface. However, the Vfb hysteresis for the d-SiO2-processedcapacitors decreased as follows: D-H2 (0.56 V) > D-N2 (0.43 V) >D-O2 (0.37 V). These results indicate that the density of the trap/detrap sites at the Ga2O3/Al2O3 interface decreased because of themodification of the Ga2O3 surface by the d-SiO2 process. Tounderstand the characteristics of the Ga2O3/Al2O3 interfaces, theDit was estimated using a conductance method.34 The energydistribution of Dit for the Control, D-O2, D-N2, and D-H2 capacitorsare shown in Fig. 6. The Control capacitor exhibited a high Dit ofabove 1012 cm−2eV−1 at the energy level of Ec - E = 0.4 eV, whereEc is the energy level of the conduction band minimum. In contrast,The D-N2 and D-H2 capacitors showed small, very similar Ditprofiles. The D-O2 capacitor significantly reduced Dit value as low as6 × 1011 cm−2eV−1 at Ec - E = 0.4 eV. The effect of atmosphere gason electrical properties will be discussed later.We next compared the Vfb shifts for the four kinds of capacitorsunder PBS conditions. Figure 7 shows the Vfb shifts for the Control,D-O2, D-N2, and D-H2 capacitors as a function of stress time undervarious bias V − Vfb of 2.0–4.0 V. A stronger applied bias voltageand longer stress time resulted in a larger Vfb shift for all of thecapacitors, indicating that the time constant and energy depth fortraps are diversified. The Control capacitor exhibited a larger Vfbshift than the capacitors prepared using the d-SiO2 process with anyatmospheres. The maximum Vfb shift for the Control, D-H2, D-N2,and D-O2 samples was 1.26, 1.05, 086, and 0.81 V, respectively,when the bias voltage was 4.0 V and the stress time was 300 s.Notably, the d-SiO2 process effectively reduced the Vfb shift inducedby a high bias voltage stress. The same trend observed in Fig. 5 isseen in Fig. 8. The poor electrical characteristics of the Controlcapacitor suggest the presence of an unstable layer on the Ga2O3surface. In addition, the Vfb shift exhibits a linear relationship withstress time on a logarithmic scale, which can be explained byelectron trapping by the near-interface traps close to theFigure 1. β-Ga2O3/Al2O3/Pt MOS capacitor fabrication flow using d-SiO2process.ECS Journal of Solid State Science and Technology, 2026 15 064005Ga2O3/Al2O3 interface. The same phenomenon in GaN/SiO₂ stacksis also explained by this model.36 According to this model, injectedelectrons are trapped at the trap sites nearest to the interface. Oncethose sites are full, the electrons are trapped at the next-nearest trapsites.DiscussionWe found that the d-SiO2 process effectively improves thecharacteristics of β-Ga2O3/Al2O3/Pt MOS capacitors. Regardingelectrical properties, an approximately half-Vfb hysteresis and anapproximately 0.45 V smaller Vfb shift under PBS were found for theβ-Ga2O3/Al2O3/Pt MOS capacitor fabricated using the d-SiO2process in O2 compared with those observed for the Controlcapacitor. This hysteresis and smaller shift were attributed to themodification of the Ga2O3 surface by the d-SiO2 process. To clarifythis modification of the Ga2O3 surface during the d-SiO2 processunder various atmospheres, we evaluated the Ga depth profile in theSiO2 layers using SIMS analysis. Figure 9 shows depth profiles ofthe Ga concentration in Ga2O3/SiO2 stacks annealed at 800 °C underO2, N2, and 3% H2 atmospheres. In this figure, as-grown refers to aspecimen not subjected to annealing. Compared with the Gaconcentration in the as-grown specimen, those in the SiO2 layersannealed at 800 °C increased, irrespective of the atmosphere. Inparticular, the Ga concentration in the specimen annealed under H2gas increased by more than two orders of magnitude compared withthat in the as-grown specimen. In the specimens annealed under O2and N2 atmospheres, the Ga concentration increased by approxi-mately one order of magnitude, and that in the specimen annealedunder N2 was slightly greater than that in the specimen annealedunder O2. The Ga concentration correlates with the amount of Ga2O3decomposition, and Ga2O3 decomposition increases as follows:D-H2 » D-N2 > D-O2.We investigated the effect of the atmosphere gas on thedecomposition of β-Ga2O3. The decomposition of β-Ga2O3 underN2 gas (Eq. 1) has been reported to start at 1150 °C:36,37( ) = ( ) + ( ) [ ]Ga O s Ga O g O g 12 3 2 2In addition, Ga2O has been reported to be further decomposedaccording to Eq. 2 at approximately the same temperature:35,36( ) = ( ) + ( ) [ ]Ga O g GaO g Ga g 22Therefore, these decomposition reactions cannot proceed at 800 °C.By contrast, in N2 + H2 mixture gas, the onset of decompositionof β-Ga2O3 (Eq. 3) has been reported to be lowered to 350 °C and thedecomposition rate has been reported to increase as the annealingtemperature is increased from 350 to 600 °C.36( ) + ( ) = ( ) + ( ) [ ]Ga O s 2H g Ga O g 2H O g 32 3 2 2 2These previous reports indicate that, in the present study, thedecomposition of Ga2O3 proceeded, resulting in modification of theGa2O3 surface.To understand the increase in the Ga concentration in the SiO2layers under N2 and O2 atmospheres, we used SIMS to evaluate thehydrogen concentration in SiO2 films fabricated by PE-ALD.Figure 10 shows depth profiles of the hydrogen concentration inGa2O3/SiO2 stacks annealed at 900 °C under O2 and N2 atmospheres.The hydrogen concentration in the as-grown SiO2 film was found tobe as high as 4 × 1021 atoms cm−3. The hydrogen concentrationdecreased to 4 × 1020 atoms cm−3 after the films were annealed at900 °C, irrespective of whether an O2 or N2 gas atmosphere wasused, indicating that approximately 3.6 × 1021 atoms cm−3 ofhydrogen was released from the SiO2 layer when the films wereannealed at 900 °C. Although the d-SiO2 process was conducted at aslightly lower temperature of 800 °C, assuming that it releases acomparable amount of H2 gas, Ga2O3 decomposition according toEq. 3 occurred even under an N2 or O2 gas atmosphere. In the d-SiO2process under N2 or O2 gas, an extremely thin layer on the Ga2O3surface could be removed because Ga2O3 decomposition stoppedwhen hydrogen atoms release from the SiO2 dummy layer iscompleted. Here, it is thought that the Ga2O3 surface has not beenFigure 2. AFM images of Ga2O3 surfaces after (a) SPM treatment and (b) the dummy-SiO2 removal.Figure 3. Vfb hysteresis and RMS-RMS(SPM) value as a function of theBHF treatment time.ECS Journal of Solid State Science and Technology, 2026 15 064005completely decomposed, and that Vo and Ga vacancies have partiallyformed on the surface. Although oxygen atoms from the SiO2 filmhave been supplied since the early stages of annealing,38 oxidationdominantly occurs after hydrogen atoms released. As a result,oxygen atoms from SiO2 film are thought to compensate for Vosites and decrease electrical defects. In particular, O2 gas enabled theremoval of the thinnest Ga2O3 surface layer because oxygen atomsfrom outside partially inhibits the decomposition of Ga2O3 by H2 gasin Eq. 3 and compensate for Vo sites. Considering with Ga depthprofile in Fig. 9, as a result, the unstable layer on the Ga2O3 surfacewas effectively removed and a modified Ga2O3 surface was obtained.However, in the d-SiO2 process under H2 gas, since hydrogen atomsare constantly supplied from outside, Eq. 3 proceeded. Excess Ga2O3Figure 4. C–V characteristics of the (a) Control, (b) D-O2, (c) D-N2, and (d) D-H2 capacitors. In (a)–(d), the number of voltage sweeps was five. (e) Vfb hysteresisas a function of number of voltage sweeps.Figure 5. Vfb hysteresis as a function of applied V − Vfb at first voltagesweep for the Control, D-O2, D-N2, and D-H2 capacitors.Figure 6. Dit distributions for the Control, D-O2, D-N2 and D-H2 capacitors.ECS Journal of Solid State Science and Technology, 2026 15 064005removal from the Ga2O3 surface caused and Vo remained on theGa2O3 surface because of no oxygen supply. As a result, these Vo ledto a degradation of the electrical properties. To enhance the effect ofthe d-SiO2 process, further research is needed to optimize parametersuch as annealing duration time and atmosphere.Figure 7. Vfb shifts at measurement frequency of 1 MHz as a function of stress time under positive-bias stress conditions for the (a) Control, (b) D-O2, (c) D-N2,and (d) D-H2 capacitors. Various bias voltages, V − Vfb, ranging from 2.0 to 4.0 V were applied.Figure 8. Vfb shifts as a function of bias voltage, V − Vfb, for the Control,D-O2, D-N2, and D-H2 capacitors. The stress time was 300 s.Figure 9. Ga depth profile in Ga2O3/SiO2 stacks subjected to various PDAtreatments at 800 °C under O2, N2, and 3% H2 atmospheres, along withprofile for an as-grown sample, as determined by SIMS measurements.ECS Journal of Solid State Science and Technology, 2026 15 064005ConclusionsUsing a proposed Ga2O3 surface treatment—the d-SiO2 processunder O2, N2, and 3% H2 atmospheres—we systematically investi-gated the electrical properties of β-Ga2O3/Al2O3/Pt MOS capacitors.The d-SiO2 capacitors were found to exhibit improved Vfb hysteresisand Vfb stability under PBS compared with a capacitor that has anunstable layer without the d-SiO2 process. In the d-SiO2 process,residual hydrogen that remained in the SiO2 dummy layer removedthe unstable surface layer of Ga2O3 even when the specimens wereannealed at a low temperature of 800 °C, resulting in superiorelectrical characteristics.AcknowledgmentsThis research was supported in part by the Ministry ofEducation, Culture, Sports, Science and Technology, Japan(NEXT), through its “Creation of Innovative Core Technology forPower Electronics” Program Grant Number JPJ009777 and ARIM(JPMXP1223NM5088). The authors thank to Mr M. Hirose ofShibaura Institute of Technology for his support during this study.ORCIDToshihide Nabatame m https://orcid.org/0000-0002-5973-0230Yoshihiro Irokawa m https://orcid.org/0000-0002-6531-4356Tomomi Sawada m https://orcid.org/0000-0002-2335-4480Hiromi Miura m https://orcid.org/0009-0005-4618-8736Manami Miyamoto m https://orcid.org/0009-0000-8395-9484Takashi Onaya m https://orcid.org/0000-0002-2710-8623Yasuo Koide m https://orcid.org/0000-0001-8321-9822Kazuhito Tsukagoshi m https://orcid.org/0000-0001-9710-2692References1. M. Higashiwaki, K. Sasaki, A. Kuramata, T. Masui, and S. Yamakoshi, Appl. Phys.Lett., 100, 013504 (2012).2. K. Zeng, A. Vaidya, and U. Singisetti, IEEE Electron Device Lett., 39, 1385 (2018).3. H. H. Tippins, Phys. Rev., 140, A316 (1965).4. T. Onuma, S. Saito, K. Sasaki, T. Masui, T. Yamaguchi, T. Honda, andM. Higahsiwaki, Jpn. J. Appl. Phys., 54, 112601 (2015).5. H. He, R. Orlando, M. A. Blanco, and R. Pandey, Phys. Rev. B, 74, 195123 (2006).6. N. Ueda, H. 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