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[02-EDL-Manuscript　updated　20240417.pdf](https://mdr.nims.go.jp/filesets/58db0eee-7390-4d1f-ac82-c3cf467addba/download)

## Creator

[Wen Zhao](https://orcid.org/0000-0001-8159-8195), [Satoshi Koizumi](https://orcid.org/0000-0003-4961-5658), [Meiyong Liao](https://orcid.org/0000-0003-1361-4266)

## Rights

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## Other metadata

[P-Channel MOSFETs on Phosphorous-Doped n-Type Diamond](https://mdr.nims.go.jp/datasets/75e60b9b-47e1-4570-a367-022e4d668d65)

## Fulltext

Abstract—P-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) are demonstrated on phosphorus-doped n-type diamond epilayers. The p-channel nature is due to the surface conductivity based on hydrogenated termination on the n-type diamond surface. The MOSFET exhibit normally-off properties with accumulation mode and show a threshold of -1.1 V and an on/off ratio of 109. The maximum drain current is around 1.8 mA/mm and the transconductance is 0.4 mS/mm, which decreases as the phosphorus concentration increases in the n-type diamond epilayer. The demonstration of p-channel MOSFETs on the n-type diamond epilayer facilitates the development of complementary MOS (CMOS) circuits on a single diamond wafer.    Index Terms—N-type diamond, p-channel MOSFET, Surface Conductivity  I. INTRODUCTION  iamond, with its exceptional material properties such as ultra-wide bandgap, high breakdown voltage, and high thermal conductivity, presents a promising platform for next-generation electronic devices [1-4]. The development of diamond electronics has been directing toward two main topics, high-power, high-voltage, and high-frequency electronic devices[5, 6] and integrated circuits [7, 8] consuming less energy and reliable under extreme conditions. Diamond metal-oxide-semiconductor field-effect transistors (MOSFETs) based on surface conductivity have been mostly concentrated and exciting progress has been achieved, such as in power handling and blocking voltage boosting[6, 9], frequency escalating[10, 11], and thermal stability improvement[12, 13].  To enable diamond-based integrated circuits, complementary metal-oxide-semiconductors (CMOS) are desirable for efficient power management, which requires both p-type and n-type channel conductivities as those for silicon microelectronics. P-channel diamond MOSFETs have been extensively investigated either on hydrogenated diamond surface or boron-doped diamond [11, 14, 15]. By combining surface conductivity p-channel diamond MOSFET with n-channel GaN FET, complementary power amplifiers were proposed and developed[16]. Such a hybrid technique represents a promising method for certain applications  This work was supported by JSPS KAKENHI (Grant Number 20H02212, 22K18957). (Corresponding author: Meiyong Liao, Satoshi Koizumi) Wen Zhao, Satoshi Koizumi, and Meiyong Liao are with National Institute for Materials Science, Ibaraki 305-0044, Japan. (e-mail: meiyong.liao@nims.go.jp; koizumi.satoshi@nims.go.jp)  considering the difficulty in obtaining n-type diamond. Recently, we demonstrated n-channel MOSFETs on phosphorus-doped n-type diamond epilayer [17]. From the viewpoint of integrated circuits with numerous FETs, CMOS on the same diamond wafter is the extreme pursuit. A sophisticated p-channel diamond MOSFET was reported on an n-type diamond epilayer with a heavily boron-doped p+ layer as the source (S) and drain (D) contacts and an OH surface termination under the gate (G) dielectric oxide. This p-channel MOSFET was claimed to be inversion type[18]. In this work, we realize the p-channel MOSFETs on hydrogen (H)-terminated surface fabricated on phosphorus-doped n-type diamond epilayers. Both the S and D contacts and gate dielectric oxide are fabricated on the H-terminated diamond surface. The MOSFETs exhibit a normally-off nature operated in accumulation mode.   II. EXPERIMENTAL  A. N-type Diamond Epilayers Growth The p-channel MOSFETs were fabricated on lightly phosphorus-doped n-type diamond epilayers grown on type-Ib (111) oriented high-pressure high-temperature (HPHT) diamond substrates by using a microwave plasma assisted chemical vapor deposition (MPCVD)[19]. The surface of the as-grown n-type diamond epilayers were hydrogenated. Two n-type diamond epilayers with different phosphorus concentrations of [P]~1016 cm-3 and [P]~1017cm-3 were utilized in this study. The thickness of the n−type layer was about 2.2 µm. The n-type diamond epilayers were exposed to air for a couple of days, as those done for intrinsic diamond epilayers for the formation of 2-dimensional hole gas (2DHG)[20]. B. Device Fabrication and Measurements Wen Zhao, Satoshi Koizumi*, and Meiyong Liao* Accumulation-mode p-channel MOSFETs on phosphorous-doped n-type diamond D  Fig.1 (a) Fabrication procedure for the diamond MOSFETs; (b) Optical image of the fabricated transistor with 100 µm gate length; (c) Schematic cross-section of the p-channel MOSFET. mailto:meiyong.liao@nims.go.jpThe fabrication process of the MOSFETs on the n-type diamond epilayers with H-termination is similar to those on the hydrogenated diamond surface with 2DHG [20, 21], as shown in Fig. 1(a). A laser photolithographic technique was used for the MOSFETs fabrication. A 10 nm-thick Pd layer is directly contacted to the H-terminated diamond surface, followed by 10 nm-thick Ti and 80 nm-thick Au, to form the Ohmic contact as the source and drain electrodes. Consequently, oxygen plasma was used to isolate the devices by forming mesa structure. Then, an Al2O3 layer with a thickness of 27 nm was grown by an atomic layer deposition (ALD) at 400 K on the gate area defined by the laser lithography. Finally, a 10 nm-thick Ti layer covered by a 60 nm thick Au layer was deposited on the Al2O3 layer. The gate length is 16 µm and the width is 80 µm. The source-gate and drain-gate gaps are both 10 µm. Fig.1(b) illustrates the optical image of a typical MOSFET and Fig.1 (c) is the cross-section structure of the MOSFET. The current-voltage (I-V) characteristics were measured by a semiconductor analyzer in the air at room temperature by using a probe station with a current noise level less than 10-13 pA.  III. RESULTS AND DISCUSSION It was confirmed that there was an electrical current flow on the H-terminated n-type diamond epilayer between the source and drain electrodes before the gate formation. The current level from the epilayer with [P]~1016cm-3 is higher than that of the epilayer with [P]~1017cm-3, implying the depletion of 2DHG hole by electrons from the n-type diamond epilayers. But the current level (10-5 A) of the H-terminated n-type diamond is ~two orders of magnitude lower than that (10-3A) on the intrinsic diamond layer with H-termination. We investigate the drain current (IDS) vs drain voltage (VDS) characteristics of the MOSFETs fabricated on the diamond epilayers with different phosphorous concentrations by varying the gate voltage (VGS) from -8 V to 2 V with a step of 1 V, as shown in Fig.2. The obtained results indicate that the drain currents are well modulated by the gate voltage. All the MOSFETs have obvious p-type conductivity and pinch-off characteristics. The IDS at VDS=-10 V and VGS= -8V is around 1.8 mA/mm for [P]~1016cm-3 (Fig.2a), which is reduced to 1.1 mA/mm for [P]~1017cm-3 (Fig.2b). The on-resistance is around 301Ω‧mm and 360 Ω‧mm, for [P]~1016cm-3 and 1017cm-3, respectively. Therefore, the higher [P] in the n-type diamond epilayer leads to partial depletion of holes on the surface channel. Considering that the Ohmic contacts were formed on the H-terminated diamond surface, the MOSFETs fabricated on the n-type diamond epilayers show an accumulation behavior.  The fabricated MOSFETs on the n-type diamond epilayer for [P]~ 1016 cm-3 show a normally-off behavior, as disclosed in the transfer properties of IDS vs VGS at VDS= -8 V in Fig. 3(a). The threshold voltage Vth is around -1.1 V. The Vth varies with the measurement history due to the trap states at the interface of Al2O3/diamond or in the Al2O3 layer[22]. Taking into account the facts: (1) the appearance of electrical conductivity of the H-terminated surface that is over three orders of magnitude higher than that of the lightly phosphorous-doped n-type diamond epilayer itself with an oxidized surface [23], and (2) the Ohmic contact properties of the Pd/Ti/Au electrode on the H-terminated surface, the present MOSFETs on the H-terminated n-type diamond layer exhibit the similar electrical behavior as those on H-terminated intrinsic diamond [21, 22]. The fabricated MOSFETs show an on/off ratio over 109, as shown in Fig. 3 (c). The subthreshold swing is around 120 mV/dec. The maximum transconductance gmax value is around 0.4 mS/mm, as disclosed in Fig.3(d). The field-effect  Fig.2 IDS-VDS output characteristic curve of MOSFETs fabricated on the n-type epilayer with (a) [P]~ 1016cm3 and (b) 1017cm3. The gate length is 16 µm, width 80 µm, and the source-gate and drain-gate gaps are both 10 µm.  Fig.3 The transfer characteristics of diamond MOSFET at gate drain voltage of -8 V on the n-type layer with [P]~ 1016cm3 (a) Drain current vs gate voltage; (b) (-IDS)1/2 vs gate voltage; (c) log scale of drain current vs gate voltage, and (d) transconductance. Transconductance; (d)  Fig.4 Energy band diagrams when applying (a) V=0V; (b) V<0V, at the density of 1016cm3. 3 First Author et al.: Title hole mobility µeff calculated by the quadratic model [20] is around  20 cm2/V･s. The formation mechanism of p-channel conductivity on the hydrogenated n-type diamond surface is still under investigation. Based on the above experimental data, we speculate that the H-termination forms a p-type surface conductive layer (SCL) after the exposure to air, which forms a pn junction near the n-type diamond surface. At zero gate bias, the surface holes are partially depleted with a surface upward band bending. The deposition of ALD-Al2O3 further depletes the holes on the diamond surface, which eventually leads to the normally-off operation of the MOSFETs here[22]. As the negative gate biases are large enough, the surface Femi level bends upward more strongly and holes accumulate near the surface, as illustrated in Fig.4. The increase in the phosphorous concentration in the diamond epilayer just depletes more holes on the surface and changes the surface band upward strength. The drain current level of the p-channel MOSFETs is five orders of magnitude higher than those of n-channel ones fabricated on the n-type diamond epilayer at room temperature. Nevertheless, the conductivity difference becomes only 10 times at 573 K. The demonstration of high-temperature thermal stability for the p-channel MOSFETs based on surface conductivity up to 673 K provides a promising potential for high-temperature diamond CMOS on the same n-type diamond epilayer by using the planar fabrication process.  IV. CONCLUSIONS We demonstrated p-channel MOSFETs on phosphorous-doped n-type diamond epilayers with hydrogen termination on the surface. The resulting MOSFETs exhibited normally-off behavior and were operated in accumulation mode. The drain current was around 1.8 mA/mm at VGS=-8 V and VDS=-10 V and the maximum transconductance was around 0.4 mS/mm. The fabrication of p-channel MOSFETs on the n-type diamond epilayer provides a facile route for the development of high-temperature CMOS working at high temperatures. REFERENCES [1] J. Tsunoda, N. Niikura, K. Ota, A. Morishita, A. Hiraiwa, and H. Kawarada, "580 V Breakdown Voltage in Vertical Diamond Trench MOSFETs With a P− -Drift Layer," IEEE Electron Device Letters, vol. 43, no. 1, pp. 88-91, 2022, doi: 10.1109/LED.2021.3131038. [2] C. E. Nebel, "CVD diamond: a review on options and reality," Functional Diamond, vol. 3, no. 1, p. 2201592, 2023/12/31 2023, doi: 10.1080/26941112.2023.2201592. [3] T. T. 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