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## Creator

[Kirill Bulgarevich](https://orcid.org/0000-0003-1731-3153), [Kenji Sakamoto](https://orcid.org/0000-0002-1379-874X), [Takeshi Yasuda](https://orcid.org/0000-0003-4652-9105), [Takeo Minari](https://orcid.org/0000-0001-7690-221X), [Masayuki Takeuchi](https://orcid.org/0000-0002-0207-0665)

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[Operational Stability Enhancement of Polymeric Organic Field‐Effect Transistors by Amorphous Perfluoropolymers Chemically Anchored to Gate Dielectric Surfaces](https://mdr.nims.go.jp/datasets/93361a36-184a-4c28-8447-18b4e1c3e10d)

## Fulltext

DOI: 10 Operational Stability Enhancement of Polymeric Organic Field-Effect Transistors by Amorphous Perfluoropolymers Chemically Anchored to Gate Dielectric SurfacesKirill Bulgarevich, Kenji Sakamoto,* Takeshi Yasuda, Takeo Minari, and Masayuki Takeuchi K. Bulgarevich, Dr. K. Sakamoto, Dr. T. MinariNational Institute for Materials Science (NIMS), 1-1 Namiki, Tsukuba, Ibaraki 305-0044, JapanE-mail: SAKAMOTO.Kenji@nims.go.jpDr. T. Yasuda, Prof. M. TakeuchiNational Institute for Materials Science (NIMS), 1-2-1 Sengen, Tsukuba, Ibaraki 305-0047, JapanK. Bulgarevich, Prof. M. TakeuchiFaculty of Pure and Applied Sciences, University of Tsukuba, 1-1-1 Tennodai, Tsukuba, Ibaraki 305-8571, JapanKeywords: organic field-effect transistors, polymeric organic semiconductors, perfluoropolymers, self-limited thinning processes, bias-stress effects Bias-stress resistance of polymer-based organic field-effect transistors (OFETs) is considerably enhanced by coating the gate dielectric surface with an amorphous perfluoropolymer (CYTOP). In bottom-gate (BG) OFETs offering a relatively simple fabrication process, the CYTOP coating causes a serious problem; that is, thin film formation of organic semiconducting polymers generally fails due to the lyophobic properties of CYTOP. This problem is solved by patterning the CYTOP coating layer with suitable designs. Here, a simple photo-patterning method is established using CYTOP terminated with amidosilyl functional groups. This method is composed of self-limited thinning process of CYTOP coating layers, exposure to vacuum ultraviolet light through a photomask, and development. BG/top-contact OFET arrays are fabricated using poly(2,5-bis(3-hexadecylthiophene-2-yl)thieno[3,2-b]thiophene) as the semiconducting polymer. The initial electrical properties and bias-stress resistance are compared with those of OFETs with octadecyltrichlorosilane (ODTS)-treated gate dielectrics. The CYTOP- and ODTS-OFETs show approximately the same initial electrical properties with very small device-to-device variation, while the CYTOP-OFETs exhibit much higher intrinsic bias-stress resistance. Therefore, the spin-coating combined with the simple photo-patterning method is a promising technique that can form polymeric organic semiconductor layers on CYTOP layers and produce BG OFETs exhibiting very high operational stability.1. IntroductionOrganic field-effect transistors (OFETs), especially solution-processed OFETs, are the key devices in large-area, low-cost, light-weight, flexible, and stretchable electronics.[1-6] As a result of enormous efforts, the field-effect charge carrier mobility has been improved for both polymeric and small-molecule organic semiconductors, and it is comparable to or surpasses that of transistors based on amorphous silicon (a-Si) at present. This is due to the synthesis of high performance organic semiconducting molecules and the precise control of molecular orientation by thin film formation processes and surface modification of device substrates.[7,8] In addition to sufficient field-effect charge carrier mobility, long-term stability of OFETs is also essential for commercial applications. The change in the electrical characteristics under continuous operation and atmospheric conditions must be minimized. Since high intrinsic material stability is a crucial requirement for realizing stable OFETs, environmentally stable organic semiconductors have been synthesized for both p- and n-types during the last two decades.[9] Passivation, which protects the active layer from water, oxygen, and other environmental elements present in ambient conditions, is also useful for enhancing the environmental stability.[10,11] The choice of gate dielectrics or the chemical modification of gate dielectric surfaces is another key point to realize OFETs with high operational and environmental stability. The gradual shift of the threshold voltage, at which the transistors switch on, with time toward the applied gate bias voltage is undesirable operational instability known as the “bias-stress effect”. The proper choice and surface pretreatment of gate dielectrics are known to decelerate the bias-stress effect and improve the environmental stability as well.[12-16]Hydroxyl groups and/or adsorbed water molecules at the interface between the gate dielectric and the active layer relate to the threshold voltage shift and the current hysteresis of OFETs.[17-19] A hydroxyl-free amorphous fluoropolymer, poly(perfluorobutenylvinylether), is a promising gate dielectric material or a coating material for gate dielectric surfaces for fabricating electrically stable OFETs, because it is an excellent electrical insulator and exhibits very high water repellency (water contact angle of 115). This polymer is known under the trade name CYTOP (AGC Inc.), and high electrical stability has been reported for OFETs with CYTOP gate dielectrics or CYTOP-coated gate dielectrics.[15,20,21] However, the very high water-repellent characteristic restricts the OFET structure and the deposition process of active layers. Highly hydrophobic surfaces like CYTOP induce the dewetting of common organic solvents; i.e. are lyophobic, preventing the stable formation of organic thin films by solution processes.[22,23] Thus, for the bottom-gate (BG) structures in which the active layers are deposited on the gate dielectrics, the deposition process of active layers is restricted to thermal evaporation in most cases.[19-21] To utilize solution processing techniques except for push coating,[24] it is necessary to adopt top-gate (TG) structures, in which the CYTOP gate dielectrics are placed onto the active layers.[23,25,26] Since CYTOP has excellent chemical stability and dissolves in fluorinated solvents that are orthogonal to most organic semiconductor materials, its deposition does not damage the active layers underneath in most cases.[22,23,25] However, in our preliminary experiments, the deterioration of the current on/off ratio was observed in TG OFETs with an active layer of poly(2,5-bis(3-hexadecylthiophene-2-yl)thieno[3,2-b]thiophene) (pBTTT-C16). This result suggests that the fluorinated solvent of CYTOP affects the active layer more or less. In addition, BG OFETs offer a relatively simple fabrication process and are desirable in some applications. Thus, the development of a simple solution coating method allowing us to fabricate BG OFETs with CYTOP gate dielectrics would considerably expand the application area of OFETs.In this study, we developed a simple spin-coating method that can form polymeric active layers on CYTOP-coated gate dielectric surfaces and achieved extremely high operational stability of BG OFETs. The dewetting problem in spin-coating on hydrophobic surfaces exhibiting a water contact angle of ~100 can be solved by making the outer peripheral area of the substrate hydrophilic.[27] However, such a simple hydrophobic-hydrophilic pattern is not applicable to more hydrophobic surfaces. Recently, we reported that the dewetting problem on carefully prepared octadecyltrichlorosilane (ODTS)-treated surfaces, which exhibit a water contact angle of ~110, can be solved by pattering the surfaces with hydrophobic and hydrophilic regions in suitable designs. [28] Although the hydrophobic-hydrophilic pattern must be re-designed due to higher hydrophobicity of CYTOP, this strategy should be effective for CYTOP-coated surfaces. The ODTS-treated surfaces can be fully hydrophilized by vacuum ultraviolet (VUV) light exposure alone, but not the CYTOP-coated surfaces. Thus, in this study, we established a simple resist-free photo-patterning method of CYTOP-coated surfaces, which consisted of self-limited thinning process of the CYTOP coating layer, exposure to VUV light through a photomask, and development.Here, pBTTT-C16 was selected as the active layer material of BG OFETs. pBTTT-C16 and its derivatives are promising polymeric semiconductors showing a field-effect hole mobility comparable to that of a-Si (~0.5 cm2V-1s-1).[29-32] The combination of pBTTT-C16 and CYTOP is very attractive in terms of charge transport and operational stability. The highly hydrophobic nature of CYTOP layers induces edge-on orientation of organic semiconducting molecules, which aligns the - stacking direction parallel to the surface plane. The edge-on orientation is preferable for the charge transport in planar OFETs, because the channel current flows parallel to the gate dielectric surface. In addition, CYTOP layers were reported to be good homeotropic surface alignment layers for smectic liquid crystals compared to other conventional ones.[33] pBTTT-C16 is a liquid crystalline polymer showing a smectic-like liquid crystalline phase around 150C, in which highly ordered -stacked backbone structures are separated by melted side chains.[34] The liquid crystalline nature facilitates reorientation and organized assemblies of the backbone structures. Thus, the crystallinity of pBTTT-C16 active layers might be improved by annealing at a liquid crystalline temperature under the presence of CYTOP alignment layers. As a result, the enhancement of operational stability can be expected, because the operational stability has a positive correlation with the crystallinity of active layers.[35] In this study, the bias stress measurements were first performed under vacuum conditions so that the improved operational stability by the surface modification of gate dielectrics was not buried in the instability induced by atmospheric oxygen and moisture. Assessing the intrinsic (upper-limit) operating stability of OFETs under vacuum conditions makes sense because environmental instability can be eliminated or significantly reduced by passivation. Then, without passivation, the operational stability of OFETs was assessed in air. Under both vacuum and atmospheric conditions, the OFETs with CYTOP-coated gate dielectrics exhibited very high resistance against the on-state (negative) gate-bias stress compared to the OFETs with ODTS-treated gate dielectrics.2. Spin-Coating Method onto CYTOP-Coated SubstratesAs the hydrophobicity of substrate surfaces increases, organic thin-film formation by spin-coating becomes difficult due to the dewetting of common organic solvents. Indeed, the formation of pBTTT-C16 films with a thickness of a few tens of nanometers failed on uniformly ODTS-treated and CYTOP-coated SiO2 surfaces. This coating issue can be overcome by forming a suitable hydrophobic-hydrophilic (lyophobic-lyophilic) pattern on the surface,[28,36] and high performance OFETs can be fabricated in the hydrophobic areas. Figure 1a shows the hydrophobic-hydrophilic pattern used for CYTOP-coated SiO2 surfaces. For ODTS-treated SiO2 surfaces, hydrophobic-hydrophilic patterns can be easily formed by VUV light exposure through a photomask, as already reported.[28,36] The ODTS molecules in the areas exposed to VUV light are removed, and the light-exposed areas become hydrophilic. In contrast, CYTOP-coated SiO2 surfaces cannot be hydrophilized sufficiently by VUV light exposure alone, because a residue produced by VUV light exposure remains. To obtain sufficient hydrophilicity, the residue must be removed by additional processing. Therefore, we first established a method to produce hydrophobic-hydrophilic patterns with sufficient contrast on CYTOP-coated SiO2 surfaces without lowering the smoothness of CYTOP surfaces.The pattering method established in this study is shown in Figure 2a. The hydrophobic-hydrophilic patterns of CYTOP-coated SiO2 surfaces are formed by the following three steps: (i) formation of 5 nm-thick CYTOP coating layers using a self-limited thinning process, (ii) exposure to VUV light (wavelength 172 nm) through a photomask, and (iii) development by sonication in deionized water (removal of a residue produced by the exposure). The first step is a crucial process to form hydrophobic-hydrophilic patterns with sufficient contrast and with smooth CYTOP surfaces. The residue produced by exposure to VUV light can be reduced by utilizing a very thin CYTOP coating layer. However, very thin CYTOP layers formed directly by spin-coating with a diluted solution could not be used, because the surface roughness increased with decreasing layer thickness in the thickness range below 30 nm as shown in Figure S1. Thus, we focused on a self-limited thinning process of CYTOP layers, which was realized by using CYTOP terminated with amidosilyl functional groups (M-type). A relatively thick (85 nm thick) CYTOP layer was first formed on a hydrophilized SiO2 surface by spin-coating and then baking at 180C. During baking, the CYTOP polymers with amidosilyl functional groups that contacted the SiO2 surface were chemically anchored on it. Unreacted CYTOP polymers were removed by subsequent sonication in a fluorinated solvent. Figure 2b is the sonication time dependence of the CYTOP layer thickness measured with a stylus profiler, clearly indicating that the film thickness rapidly decreases down to 5 nm and then become constant. By performing sonication for 60 min, 5 nm-thick smooth CYTOP coating layer with a root mean square (rms) surface roughness of 0.24 nm was obtained and exhibited a water contact angle of 116. The AFM image is shown in Figure S2. The thinned CYTOP coating layer is composed of perfluoropolymers covalently bonded to the SiO2 surface, providing strongly adherent thin polymeric layers with high uniformity, like “polymer brush”. This coating layers are expected to have high resistance for delamination or cracking during development following exposure to VUV light and during spin-coating of organic semiconductor solutions. Next, to produce a hydrophobic-hydrophilic pattern, the CYTOP-coated SiO2 surface was exposed to VUV light for 30 min through a photomask. Then, the residue produced by the VUV light exposure was carefully removed by sonication in deionized water for 10 min three times. This careful removal is the key to success of the next spin-coating. The exposed area exhibited a water contact angle of 6.Now, a uniform pBTTT-C16 film can be formed on the CYTOP-coated SiO2/n+-Si(100) substrate with the hydrophobic-hydrophilic pattern shown in Figure 1a by spin-coating. Figure 1b shows the optical microscope image of the pBTTT-C16 film on the CYTOP-patterned substrate. This image was captured after completing an OFET array and performing all electrical measurements. From this image, one can see that a continuous pBTTT-C16 film was formed in both hydrophobic and hydrophilic areas. The thickness of the pBTTT-C16 film determined with a stylus profiler was 26  1 nm. 3. OFET CharacteristicsTo obtain the terrace-phase morphology, the pBTTT-C16 film on the CYTOP-patterned SiO2/n+-Si(100) substrate was annealed at 150C in a nitrogen atmosphere. A BG/top-contact (TC) OFET array was completed by depositing source and drain electrodes (MoO3 (25 nm thick) /Au (63 nm thick)) through a shadow mask using a vacuum thermal evaporation system. The n+-Si substrate and CYTOP-coated SiO2 layer serve as a common gate electrode and the gate dielectric, respectively. The shadow mask was aligned with the underling CYTOP patterns, and 40 OFETs with CYTOP-coated gate dielectrics, which were called “CYTOP-OFETs” hereafter, were fabricated over an area of approximately 1 cm2 on a single substrate. The channel length (L) and width (W) of the OFETs were 50 and 300 m, respectively. Although the channel direction of neighboring OFETs was orthogonal to each other as shown in Figure 1b, no difference was observed in their device properties as can be imagined. Thus, we did not distinguish the two types of OFETs with different channel directions. To check the spatial uniformity of the pBTTT-C16 active layer and the CYTOP coating layer from the viewpoint of device performance, the output and transfer characteristics of all OFETs were measured in saturation regime in vacuum. After being loaded into a vacuum probe station, the device substrate was annealed at 150C for 15 min in vacuum to remove residual oxygen and moisture from the OFETs. The typical output and transfer characteristics of the CYTOP-OFETs are shown in Figure 3a,b, respectively. In both characteristics, good p-channel transistor behavior was observed with almost no drain current (Id) hysteresis between the forward (negative direction) and reverse (positive direction) voltage sweeps. The maximum current on/off ratio was greater than 107. The field-effect hole mobility () and the threshold voltage (Vth) were obtained from the transfer characteristics in the forward gate-source voltage (Vgs) sweep using the conventional equation in saturation regime: ,                                                                            (1)where Ci (= 28.3 nF/cm2 for CYTOP-coated dielectrics) is the gate dielectric capacitance per unit area. From the transfer characteristics shown in Figure 3b, we obtained:  = 0.289 cm2V-1s-1 and Vth = -7.0 V. The subthreshold swing (SS) was determined to be 0.27 V per decade from the partial transfer characteristics that were separately measured by varying Vgs from 5 V to -5V at intervals of 0.05 V. Figure 4a-c shows the histograms of , Vth, and SS, respectively. Their average values (Av), standard deviations (), and relative standard deviations (/Av) are listed in Table 1. The  was 0.292 ± 0.010 cm2V-1s-1, and its relative variation (/Av) was less than 4 %. In addition to , the device-to-device variations of Vth (= -6.7 ± 0.2 V) and SS (= 0.30 ± 0.11 V per decade) were also small.  These small device-to-device variations indicate the high spatial uniformity of the pBTTT active layers as well as the underlying CYTOP coating layers.As the hydrophobicity of CYTOP is higher than that of ODTS, we expected a considerable improvement in the OFET properties by treating the gate dielectric surfaces with CYTOP instead of ODTS. However, the initial electrical properties of the CYTOP-OFETs were very close to those of the OFETs fabricated on a patterned ODTS-treated SiO2/n+-Si(100) substrate with the same fabrication procedure, except for the patterning of ODTS. The latter OFETs will be called ODTS-OFETs, hereafter. The electrical properties of the ODTS-OFETs, together with the details of the fabrication procedure, were already reported as those of “isotropic OFETs” in our previous paper.[28] The recipe of the ODTS treatment was described elsewhere.[36] For comparison, those data are plotted by open bars in Figure 4a-c and are presented in Table 1. The relatively large difference was observed only in SS; the average value of SS was 0.30 V per decade for the CYTOP-OFETs and 0.45 V per decade for the ODTS-OFETs. Because the SS is related to the trap density in the active layer and at the interface between the active layer and the gate dielectric, this result may indicate that the CYTOP-OFETs have a higher quality of the interface and the active layer near the interface than the ODTS-OFETs. However, at present we suspect that the SS may be degraded by the dislocation in overlapping of the MoO3 and Au layers of the bilayer source/drain electrodes. In depositing the electrodes, a 20 m-thick nickel shadow mask was used and was magnetically fixed on the active layer surface. The dislocation might be caused by the distortion of the shadow mask and/or by unexpected slight slide of the shadow mask during thermal evaporation due to its residual magnetization. The former leads to the degradation of SS of specific devices, and the latter results in the degradation of all OFETs on the same substrate. All four CYTOP-OFETs with SS 's exceeding 0.3 V per decade in Figure 4c were in the upper left corner. This degradation in SS is probably due to the local distortion of the shadow mask. Since we have not been able to completely eliminate this dislocation to date, we will not discuss in detail the difference in SS between the CYTOP- and ODTS-OFETs here. Before proceeding, we would like to refer to the extremely small Id hysteresis of the CYTOP-OFETs. In the scale of Figure 3b, no hysteresis in Id can be seen. Similarly, no Id hysteresis can be recognized in the transfer characteristics of the ODTS-OFETs, which are shown in Figure 4 of ref.28. To demonstrate smaller Id hysteresis of the CYTOP-OFETs, the enlarged transfer curves of the CYTOP- and ODTS-OFETs are shown in Figure 5. The smaller Id hysteresis of the CYTOP-OFET suggests the higher resistivity against gate-bias stress. 4. Operational StabilitySince the extrinsic instability caused by atmospheric oxygen and moisture can be removed or considerably reduced by passivation, the bias-stress effect originating from extrinsic and intrinsic factors must be examined separately. First, the bias-stress effects were measured under vacuum conditions to eliminate the extrinsic factors; i.e. we first focus on the intrinsic operational stability. The bias-stress effect of CYTOP-OFETs against an on-state bias was evaluated by repeating cycles of constant prolonged gate-bias application and transfer characteristic measurement in linear regime (|Vds| << |Vgs|). In this measurement, Vgs = -30 V and Vds = -1 V were applied to OFETs as an on-state bias up to 2.0  105 s, and the temperature of OFETs was controlled at 30C. This bias stress condition was the same as that for ODTS-OFETs, except for the total bias stress time and the temperature of OFETs: 2.5  104 s and room temperature (RT) (no temperature control), respectively, for ODTS-OFETs. Since the shift of threshold voltage in linear regime (Vthlin = Vthlin (t) - Vthlin (0)) of CYTOP-OFETs was an order of magnitude smaller than that of ODTS-OFETs as can be seen below, slight variation in  caused by fluctuation of RT has a non-negligible influence on the evaluation of Vthlin. Thus, we controlled the device temperature and extended the total bias stress time for CYTOP-OFETs. The bias stress effect for ODTS-OFETs was already reported in our previous paper.[28] For comparison, these data will be presented together with the data for CYTOP-OFETs. Figure 6a shows the transfer characteristics of a CYTOP-OFET measured at total stress times of 0, 5  103, 2.5  104 and 2  105 s, with only the forward sweep characteristics plotted. As the Vthlin was very small even after applying the on-state bias for 2  105 s, the four transfer curves are almost overlapped. The inset shows the enlarged transfer curves around -30 V, indicating the transfer curve parallelly shifts in the negative voltage direction with increasing bias stress time. This parallel shift with respect to the initial transfer curve correspond to Vthlin. The Vthlin at 5  103, 2.5  104 and 2  105 s were -0.11, -0.16, and -0.28 V, respectively. Figure 6b shows the transfer characteristics of the ODTS-OFET measured at total stress times of 0, 5  102, 5  103, 2.5  104 s. Although the operational stability of the ODTS-OFET is comparable to that of a-Si field-effect transistors (FETs), we see that the Vthlin is much larger than that of the CYTOP-OFET at the same bias stress time: for instance, Vthlin = -2.0 V at 2.5  104 s for the ODTS-OFET. Figure 6c shows the bias stress time dependence of Vthlin for both the CYTOP- and ODTS-OFETs. The much smaller variation in Vthlin was observed for the CYTOP-OFET than for the ODTS-OFET, indicating that the intrinsic operational stability can be considerably improved by changing the coating material of gate dielectric surfaces from ODTS to CYTOP. To quantitatively discuss the operational stability, the bias stress time dependence of Vthlin was fitted with a stretched exponential function: ,                                   (2)where  is the trapping time constant of carriers to fill trap levels and  (0    1) is a stretching factor representing the distribution of time constants.[37] A small value of  correspond to a wide trapping barrier height distribution.[38] The time variation of the stretched exponential function is faster than the exponential function until  and slower after that. The smaller , the faster the Vthlin shift. The smaller , the faster the Vthlin shift at the initial stage of bias-stress application. The dotted curves in Figure 6c show the best fit results:  = 1  1012 s and  = 0.28 for the CYTOP-OFET, and  = 3  108 s and  = 0.26 for the ODTS-OFET. From these fitting results, we found that the intrinsic operational stability of the CYTOP-OFET was more than three orders of magnitude higher than that of the ODTS-OFET. These  and  values can be compared with those of a-Si FETs:  = 0.39 and  = 2  106 s.[39,40] The operational stability of a-Si FETs is the benchmark for backplane applications for liquid crystal displays. The comparison of these  values suggests that OFETs that far exceed the operational stability of a-Si FETs can be potentially realized by using CYTOP-coated gate dielectrics and pBTTT-C16 as an active layer material, with the aid of passivation techniques.Next, the operational stability of both OFETs in air was measured under the same bias stress condition, except for the total bias stress time of 5  103 s. The temperature of CYTOP-OFETs was controlled at 30C and that of the ODTS-OFETs was RT (not controlled). The transfer characteristics in linear regime were measured at total stress times of 0, 2  102, 6  102, 1.4  103, 3  103, and 5  103 s. These results are shown in Figure 7. For both OFETs, the bias-stress-induced Vthlin under atmospheric conditions considerably increased compared to that under vacuum conditions. The  and  determined from the bias stress time dependence shown in Figure 7c are:   = 3  106 s and  = 0.43 for the CYTOP-OFET, and  = 4  104 s and  = 0.30 for the ODTS-OFET. Although the operational stability was significantly reduced by the extrinsic factors, we found that the operational stability of CYTOP-OFET in air is still comparable to that of a-Si FETs and two orders of magnitude higher than that of ODTS-OFET in air. These results show that not only the intrinsic operational stability of OFETs but also the operational stability under atmospheric conditions can be improved by coating the gate dielectric surfaces with CYTOP. Therefore, the simple spin-coating method established in this study is a promising technique to realize the very high operational stability of BG OFETs in vacuum and air.5. DiscussionWe succeeded in achieving extremely high intrinsic operational stability of OFETs by combining pBTTT-C16 active layers and CYTOP-coated gate dielectrics in a BG/TC device structure. The trapping time constant of the CYTOP-OFETs was at least 3 orders of magnitudes larger than that of the ODTS-OFETs. However, unlike expectations, the initial electrical properties of both the OFETs were almost the same, as seen in Figure 4. To understand these results, we acquired the AFM images of the pBTTT layers on the ODTS-treated and CYTOP-coated SiO2 surfaces, which are presented in Figure S3a,b, respectively. The molecular step and terrace structures characterizing the terrace-phase pBTTT layers were observed for both surfaces, but those for the CYTOP-coated surface is slightly obscurer than those for the ODTS-treated SiO2 surface. This is probably attributed to the difference in the surface morphology between the CYTOP-coated and ODTS-treated SiO2 surfaces. As shown in Figure S3c, the ODTS-treated surface is extremely flat except for some particles (probably polymerized particles). Meanwhile, as shown in Figure S3d, the CYTOP-coated layer has 1 nm-height and 50 nm-lateral scale structures which come from the amorphous nature of CYTOP polymers with a distributed molecular weight. This relatively long scale surface undulation may slightly reduce the charge carrier mobility. As a result, the initial electrical properties may not have improved by replacing the coating materials from ODTS to CYTOP. Next, we discuss the possible origins of the extremely high intrinsic operational stability ( = 1  1012 s) of CYTOP-OFETs. We believe that the extremely high operational stability is due to the preferred microstructure of the pBTTT/CYTOP interface. The difference in the microstructure might come from that in the crystallinity of the coating layers. In the infrared (IR) absorption spectrum of the ODTS-treated substrate shown in Figure S4, the absorption maxima for the methylene symmetric and antisymmetric C-H stretching vibrations were located between the wavenumbers that characterize the liquid-like (disordered) and crystalline alkane layers. One possible interpretation is that the ODTS self-assembled monolayers (SAMs) has a disordered surface structure due to a low molecular surface density. Such a surface leads to the lowering of water contact angle.[41] However, since the ODTS-treated substrate prepared in this study exhibited a water contact angle of > 110; i.e. no lowering of water contact angle occurred, this interpretation is not the case. Such a high water contact angle suggests that at least the topmost parts have a crystalline order uniformly in the lateral direction. According to the report by Steinrück et al.,[42] the upper parts of the alkyl chains of ODTS SAMs formed on SiO2/Si(100) by standard solution procedures are vertically aligned in all-trans conformation and hexagonally packed in lateral direction. On the other hand, the bottom parts (11 CH2 units) near the SiO2 surface are disordered due to mismatch between a cross-sectional diameter of all-trans alkyl chains (4.9 Å[41,43]) and lateral cross-linking Si-O-Si bond length (< 3.2 Å[44]). This structure model can explain both the IR absorption spectrum and the water contact angle of >110. Although the preparation procedure is different, we believe that the ODTS SAMs prepared by vapor treatment in this study have a similar structure. The mismatch mentioned above was also reported to limit the lateral crystal domain size to about 6 nm, suggesting that domain boundaries are present at a very high surface density on the ODTS-treated surfaces. These domain boundaries may contribute to trap site formation. In contrast to ODTS, the CYTOP layer anchored to the gate dielectric is amorphous. This amorphous nature prevents the formation of such trap sites at the active layer/gate dielectric interface. Therefore, the trap density at the interface and/or in the active layer is expected to be lower for CYTOP-OFETs, resulting in higher operational stability. In addition, the preferred microstructure of the pBTTT-C16/CYTOP interface might arise from the fact that the CYTOP films work as more stable homeotropic (vertical) alignment-inducing layers for smectic liquid crystals than long alkyl chain silane SAMs.[33] pBTTT-C16 is a liquid crystalline polymer showing a smectic phase at a high temperature. The self-organization of individual polymer in the liquid crystalline phase was used to improve the microstructure of the active layers in the fabrication process of OFETs. Therefore, one can imagine that the trap density related to the microstructure of active layer should be lower for the CYTOP-OFETs, resulting in higher bias-stress stability. We believe that both the amorphous nature and better homeotropic alignment capability of the CYTOP layers contribute to the extremely high intrinsic operational stability. Even without passivation, the CYTOP-OFETs exhibited in-air operational stability comparable to a-Si FETs.  This is probably due to the extremely high intrinsic operational stability of CYTOP-OFETs and very high water-repellent nature of CYTOP.6. ConclusionWe have reported extremely high intrinsic operational stability of BG/TC OFETs with CYTOP-coated gate dielectrics. To fabricate such OFETs, we first developed a simple spin-coating method of pBTTT-C16 on CYTOP-coated gate dielectric surfaces, because the highly lyophobic nature of CYTOP prevents thin-film formation of pBTTT-C16 by solution processing. This coating problem was solved by patterning the CYTOP coating layer with a suitable design, which allowed organic thin-film formation by spin-coating. The patterning of the CYTOP coating layer was a key process, which was developed in this study. The pattering process was composed of a self-limited thinning process of CYTOP coating layers, exposure to VUV light through a photomask, and development by sonication in deionized water. After spin-coating of pBTTT-C16 followed by annealing at 150C, BG/TC OFET arrays were fabricated by depositing source/drain electrodes in the unexposed areas. Very small device-to-device variations of not only the field-effect mobility but also the threshold voltage and subthreshold swing were observed for the CYTOP-OFET array, indicating high spatial uniformity of the CYTOP coating layers and pBTTT-C16 active layers. Under vacuum conditions, the extremely high bias-stress stability was observed for the CYTOP-OFETs. The trapping time constant was the order of 1012 s, while that of ODTS-OFETs was the order of 108 s, which is comparable to or surpasses that of a-Si FETs. The extremely large trapping time constant suggests that OFETs that far exceed the operational stability of a-Si FETs can be potentially realized with the aid of passivation techniques. We believe that the very high hydrophobic and amorphous natures of CYTOP polymers and the good alignment capability of CYTOP layers for smectic liquid crystals play an important role in achieving the extremely high intrinsic operational stability. The CYTOP-OFETs in air still exhibited operational stability comparable to that of a-Si FETs, while the operational stability of the ODTS-OFETs in air was two orders of magnitude lower than that of a-Si FETs. Therefore, the simple spin-coating method applicable to CYTOP surfaces, established in this study, is a promising technique to realize extremely high operational stability of BG OFETs.7. Experimental SectionPreparation of CYTOP-Coated SiO2 Gate Dielectric Surfaces with Hydrophobic-Hydrophilic Patterns: A 3% solution of CYTOP (CTL-809M) was prepared by diluting the original solution with a fluorinated solvent (CT-solv.180). Heavily doped n-type Si(100) wafers (20  20 mm2) with a thermally grown SiO2 layer were used as substrates. The SiO2 layer thickness estimated by spectroscopic ellipsometry (J. A. Woollam M-2000) was 103 nm. The substrate was cleaned by immersion for 10 min three times in a piranha solution, which is a mixture of sulfuric acid and hydrogen peroxide, rinsed several times with deionized water, and then dried with nitrogen gas blow. The substrate was spin-coated with a 3% CYTOP solution at 3000 rpm for 60 s, and then dried on a hot plate in nitrogen atmosphere in the following three steps: at 50C for 10 min, at 80C for 10 min, and at 180C for 1 h. The film thickness determined with a stylus profiler was about 85 nm. Since both ends of M-type CYTOP are terminated with amidosilyl functional groups, the perfluoropolymers in contact with SiO2 surface through the reactive end groups are chemically anchored to the surface during the thermal treatment at 180C. Then, the unanchored perfluoropolymers were removed by sonication in CT-solv.180 for 20 min three times, and then the substrate was dried with nitrogen gas blow and on a hot plate at 80C for 1h to remove the residual solvent. The reduction in the CYTOP layer thickness stopped around 5 nm in a self-limiting manner. At this stage, a smooth CYTOP coating layer with a thickness of 5 nm was obtained. To form a hydrophobic-hydrophilic (lyophobic-lyophilic) surface pattern, the CYTOP-coated substrate was exposed to VUV light (wavelength 172 nm) through a photomask, which was placed at 20 m above the substrate surface. An excimer lamp irradiation unit (Ushio SUS06) was used as the light source, and the exposure time was 30 min. Subsequently, the substrate was subjected to sonication in deionized water for 10 min three times to remove a residue produced by exposure to VUV light. Finally, the surfaces of the VUV-light-exposed areas became hydrophilic. All the above sonication treatments were performed with an ultrasonic cleaner (AS ONE USK-3A: 40 kHz, 200W).Spin-Coating of pBTTT-C16: pBTTT-C16 was purchased from Merck KGaA and used without further purification. pBTTT-C16 films were formed on the SiO2/n+-Si(100) substrates with hydrophobic-hydrophilic patterns by spin-coating with a 0.5 wt.% solution of pBTTT-C16 in o-dichlorobenzene. Prior to spin-coating, the substrate and a glass pipet were heated on hot plates at 110C and 120C, respectively. The pBTTT-C16 solution was heated to 85C using a hot bath. The heated substrate was fixed on a Teflon sample holder of a spin-coater (Active, ACT-220DⅡ), immediately covered with the hot pBTTT-C16 solution using the heated pipet, and then spun at 1000 rpm for 180 s in air. Then, the spin-coated film was dried on a hot plate at 90C for 10 min in air. Finally, the pBTTT-C16 film was annealed at 150C for 15 min in a nitrogen atmosphere to induce the terrace-phase morphology. The thickness of the pBTTT-C16 film determined with a stylus profiler was 26  1 nm. Fabrication of CYTOP-OFET Arrays with a BG/TC Structure: To fabricate a BG/TC CYTOP-OFET array, the source/drain electrodes were deposited on the annealed pBTTT-C16 film in the CYTOP-coated gate dielectric areas by sequential thermal evaporation of MoO3 (25 nm thick) and Au (63 nm thick) through a shadow mask in vacuum.[45] The shadow mask defines a channel length (L)/width (W) of 50/300 m. As shown in Figure 1b, 40 OFETs were fabricated in the CYTOP-coated regions over an area of approximately 1 cm2.Initial OFET Characterization: The electrical characteristics of OFETs were measured with a combined system of a vacuum probe station (VIC International, Inc. VMP-100) and a semiconductor parameter analyzer system composed of two source-meter instruments (Keithley 2635B and 2636B). After each OFET was isolated from the others by removing the surrounding pBTTT-C16 film using a tungsten needle in air, the OFET array substrate was introduced into the vacuum probe station. Then, the OFET array was annealed at 150 C for 15 min in vacuum (less than 10-3 Pa) to remove residual oxygen and moisture. The initial device properties were assessed under vacuum conditions less than 10-4 Pa in the dark. For all devices of the OFET array, the output characteristics were first measured by sweeping Vds under a constant Vgs, which was varied from 0 V to -30 V at intervals of 5 V. Dual sweeps of Vds were performed at intervals of 1 V: from 1 V to -30 V (forward seep) and immediately from -30 V to 1 V (reverse sweep). Subsequently, the transfer characteristics were measured six times continuously. In this measurement, Vds was fixed at -30 V and Vgs was varied from 5 V to -30 V (forward sweep) and immediately varied from -30 to 5 V (reverse sweep) at intervals of 0.5 V. Using the last forward transfer curve, the field-effect mobility and threshold voltage in saturation regime were determined. Finally, to determine the subthreshold swing with sufficient accuracy, a part of the transfer characteristic was measured by varying Vgs from 5 V to -5V at intervals of 0.05 V. The gate dielectric capacitance was obtained by measuring the capacitance of a 2 mm square electrode deposited directly on the CYTOP coating layer using an LCR meter (HIOKI 3522-50).Bias-Stress Effect Measurements: Bias-stress measurements under vacuum conditions were performed in the dark at least one week after the initial electrical characterization of OFETs described in the above section. The bias-stress effect of OFETs against an on-state bias (Vgs = -30 V and Vds = -1 V) was examined by repeating cycles of constant prolonged gate-bias application and transfer characteristic measurement in linear regime. First, the initial transfer characteristic was measured by sweeping Vgs from 2 to -30 V at Vds = -1 V, and the constant prolonged on-state bias was applied 1h after completing the initial transfer characteristic measurement. At total bias stressing times of 5  102, 5  103, 2.5  104 s and thereafter at intervals of 6 h, the on-state bias application was removed, and immediately the transfer characteristic was measured by sweeping Vgs from 0 to -30 V at Vds = -1 V. This measurement was continued up to the total bias stressing time of 2  105 s at 30C. The bias stress effects of CYTOP (ODTS)-OFETs in air were measured after filling out the vacuum chamber with ambient air of a relative humidity of 39 (34) % at 24 (25)C. The measurement procedure is the same, except for the total bias stress time (5  103 s) and the time intervals of transfer characteristic measurements.Surface and Film Characterization: The contact angles of water droplets were measured with a contact angle meter (Kyowa DM 500), and the thickness of pBTTT-C16 films, source/drain electrodes, and CYTOP coating layers was measured with a stylus profiler (Kosaka ET200). The optical microscope observations of pBTTT-C16 films were performed with an OLYMPUS BX51 optical microscope. The surface morphology was examined with an atomic force microscope (HITACHI AFM5100N and AFM5000II). The IR absorption measurement was performed with a compact FTIR spectrometer (Bruker ALPHA), which was placed in a nitrogen-substituted glove box.Supporting InformationSupporting Information is available from the Wiley Online Library or from the author.AcknowledgementsK. B. and K. S. contributed equally to this work. Part of the fabrication and evaluation of OFETs was conducted at NAMIKI foundry in NIMS. This work was supported in part by JSPS KAKENHI Grant Number 25286045.Received: ((will be filled in by the editorial staff))Revised: ((will be filled in by the editorial staff))Published online: ((will be filled in by the editorial staff))References[1] K. Fukuda, Y. Takeda, Y. Yoshimura, R. Shiwaku, L. T. Tran, T. Sekine, M. Mizukami, D. Kumaki, S. Tokito, Nat. Commun. 2014, 5, 4147.[2] S. Wang, J. Xu, W. Wang, G.-J. N. Wang, R. Rastak, F. Molina-Lopez, J. W. Chung, S. Niu, V. R. Feig, J. Lopez, T. Lei, S.-K. Kwon, Y. Kim, A. M. Foudeh, A. Ehrlich, A. Gasperini, Y. Yun, B. Murmann, J. B.-H. Tok, Z. Bao, Nature 2018, 555, 83-88.[3] N. Wang, A. Yang, Y. Fu, Y. Li, F. Yan, Acc. Chem. Res. 2019, 52, 277-287.[4] Y. Wang, L. Sun, C. Wang, F. Yang, X. Ren, X. Zhang, H. Dong, W. Hu, Chem. Soc. Rev. 2019, 48, 1492-1530.[5] X. Wu, Y. Ma, G. Zhang, Y. Chu, J. Du, Y. Zhang, Z. Li, Y. Duan, Z. Fan, J. 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Lett. 2009, 94, 143304.Figure 1. a) Design of the photomask used in this study to form a hydrophobic-hydrophilic surface pattern on CYTOP-coated SiO2 surfaces and b) optical microscope image of an OFET array with a CYTOP-coated SiO2 gate dielectric. The black rectangles in a), whose size are 1.0  1.5 mm2, are masking areas. The rectangles are placed at a pitch of 2.0 mm in the horizontal direction and at a pitch of 2.4 mm in the vertical direction.Figure 2. a) Method to produce hydrophobic-hydrophilic patterns with sufficient contrast on CYTOP-coated SiO2/Si substrates and the molecular structure of M-type CYTOP. b) Sonication time dependence of CYTOP layer thickness in process (i).Figure 3. Typical a) output and b) transfer characteristics of the CYTOP-OFETs.Figure 4. Histograms of a) field-effect hole mobility, b) threshold voltage, and c) subthreshold swing. The filled and open bars show the results for the CYTOP-OFET and ODTS-OFET arrays, respectively. The bin widths are: a) 0.005 cm2V-1s-1, b) 0.2 V, and c) 0.04 V per decade. The data for the isotropic OFET array in our previous paper[28] are plotted as those for the ODTS-OFET array.Figure 5. Enlarged transfer characteristics of the CYTOP- and ODTS-OFETs. The solid and dotted curves correspond to the forward and reverse sweeps, respectively. The transfer curves of the isotropic OFET in our previous paper[28] are plotted as those of the ODTS-OFET.Figure 6. Transfer characteristics of a) CYTOP- and b) ODTS-OFETs in the linear regime that were measured under vacuum conditions at different bias-stress times: 0, 5  103, 2.5  104, and 2  105 s for the CYTOP-OFET and 0, 5  102, 5  103, and 2.5  104 s for the ODTS-OFET. c) Bias-stress time dependence of the Vthlin shifts for the CYTOP-OFET (open circles) and the ODTS-OFET (filled squares). The bias stress condition is Vgs = -30 V and Vds = -1 V. The Vthlin(0) of the CYTOP- and ODTS-OFETs are -8.6 and -5.1 V, respectively. The dotted curves in c) represent the fitting results of the Vthlin shifts with the stretched exponential functions. The data for the isotropic OFET in our previous paper[28] are plotted as those for the ODTS-OFET.Figure 7. Transfer characteristics of a) CYTOP- and b) ODTS-OFETs in the linear regime that were measured under atmospheric conditions at different bias-stress times: 0, 2  102, 6  102, 1.4  103, 3  103, and 5  103 s. c) Bias-stress time dependence of the Vthlin shifts for the CYTOP-OFET (open circles) and the ODTS-OFET (filled squares). The bias stress condition is the same as that of Figure 6. The Vthlin(0) of the CYTOP- and ODTS-OFETs are -8.1 and -2.7 V, respectively. The dotted curves in c) represent the fitting results of the Vthlin shifts with the stretched exponential functions.Table 1. Summary of the average values (Av), standard deviations (), and relative standard deviation (/Av) of the field-effect hole mobility (), threshold voltage (Vth), and subthreshold swing (SS) for the CYTOP- and ODTS-OFET arrays.  CYTOP-OFETs  ODTS-OFETsa)   Av  /Av  Av  /Av  (cm2V-1s-1) 0.292 0.010 3.3%  0.281 0.008 2.8% Vth (V) -6.7 0.2   -6.0 0.2  SS (V/decade) 0.30 0.11   0.45 0.07 a) ref. 28.2image1.tiffimage2.tiffimage3.tiffimage4.tiffimage5.tiffimage6.tiffimage7.tiff