# Fileset [manuscript.pdf](https://mdr.nims.go.jp/filesets/3df5fd7a-8180-4ba1-98b4-767e0893485e/download) ## Creator [J. W. Liu](https://orcid.org/0000-0003-2580-7401), [T. Teraji](https://orcid.org/0000-0002-7731-0547), [B. Da](https://orcid.org/0000-0002-0785-8662), [Y. Koide](https://orcid.org/0000-0001-8321-9822) ## Rights This article may be downloaded for personal use only. Any other use requires prior permission of the author and AIP Publishing. This article appeared in J. W. Liu, T. Teraji, B. Da, Y. Koide; Electrical property improvement for boron-doped diamond metal–oxide–semiconductor field-effect transistors. Appl. Phys. Lett. 12 February 2024; 124 (7): 072103 and may be found at https://doi.org/10.1063/5.0194424.[In Copyright](http://rightsstatements.org/vocab/InC/1.0/) ## Other metadata [Electrical property improvement for boron-doped diamond metal–oxide–semiconductor field-effect transistors](https://mdr.nims.go.jp/datasets/2a7e14ff-1420-4969-94ba-272cba59ffbd) ## Fulltext 1 Electrical properties improvement for boron-doped diamond 1 metal-oxide-semiconductor field-effect transistors 2 3 J. W. Liu,1, a) T. Teraji,1 B. Da,2 and Y. Koide1 4 1Research Center for Electronic and Optical Materials, National Institute for Materials 5 Science (NIMS), 1-1 Namiki, Tsukuba, Ibaraki 305-0044, Japan 6 2Research and Services Division of Materials Data and Integrated System, NIMS, 1-1 7 Namiki, Tsukuba, Ibaraki 305-0044, Japan 8 9 a)Author to whom correspondence should be addressed; electronic 10 mail:liu.jiangwei@nims.go.jp 11 12 13 14 15 16 17 18 19 20 21 22 23 24 https://samurai.nims.go.jp/profiles?unit=wb000https://samurai.nims.go.jp/profiles?unit=kj000https://samurai.nims.go.jp/profiles?unit=kj0002 Abstract 1 High-performance boron-doped diamond (B-diamond) metal-oxide-semiconductor 2 field-effect transistors (MOSFETs) are fabricated by improving fabrication process and 3 device structures. Drain current maximum values for the B-diamond MOSFETs 4 working at room temperature (RT) and 300 °C are −1.2 and −10.9 mA/mm, respectively. 5 Both of them show on/off ratios higher than 109 and their extrinsic transconductance 6 maximum values are 29.0 and 215.7 μS/mm, respectively. These properties are better 7 than those of the previous reported values. 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 3 Diamond has been widely studied as a wide bandgap semiconductor for applications 1 in high-power, high-frequency, and high-temperature electronic devices because it 2 exhibits a high breakdown field, high carrier mobility, and high thermal conductivity.1 3 p-type channel layers of hydrogen-terminated diamond (H-diamond),2-7 4 silicon-terminated diamond (Si-diamond),8,9 and boron-doped diamond 5 (B-diamond),10-14 are employed for the fabrication of high-performance diamond-based 6 metal-oxide-semiconductor field-effect transistors (MOSFETs). 7 For the H-diamond channel layer, two-dimensional hole gases are accumulated on 8 its surface with a sheet hole density of ~1014 cm−2.15 The hole accumulation is explained 9 by the transfer doping mechanism,16 where electrons are transferred from the diamond 10 to the surface negatively charged adsorbates. The H-diamond-based MOSFETs have 11 been fabricated with high drain current maximum (ID,max, –1.35 A/mm), extrinsic 12 transconductance maximum (gm,max, 206 mS/mm), cut-off frequency (70 GHz), and 13 on/off ratio (>109).2-7 However, their high-temperature performance has not been 14 satisfactory owing to the poor thermal stability of surface adsorbates.17 15 For the Si-diamond-based channel layer,8,9 the surface bonds of C-Si are similar 16 with those of the C-H on the H-diamond to generate the hole accumulation. In order to 17 enhance the properties of the Si-diamond-based MOSFETs, heavily B-doped selectively 18 layers (concentration: 1021 cm-3) on the Si-diamond would be necessary. The 19 Si-diamond-based MOSFETs could work well at 300 and 400 ºC with excellent ID, max 20 and gm, max of –124 mA/mm and 4100 μS/mm, respectively.9 However, high-temperature 21 operation also degraded the electrical properties, such as on/off ratio decreased from 108 22 to 106. 23 For the B-diamond channel layer,10-14 the activation energy (370 meV) of boron 24 4 dopants is higher than the thermal energy (26 meV) provided at room temperature (RT). 1 Its hole density is relatively low, and B-diamond-based MOSFETs exhibit low ID,max and 2 gm,max of –0.49 mA/mm and 18.7 μS/mm, respectively.13 The B-diamond MOSFET has 3 good thermal stability after annealing at 500 ºC with ID,max and gm,max of –0.6 mA/mm 4 and 21.4 μS/mm, respectively.13 By employing the ozone precursor for the Al2O3 gate 5 oxide deposition, the Al2O3/B-diamond interfacial quality has been improved and the 6 B-diamond MOSFET operate with on/off ratio higher than 108.14 7 In order to further enhance the performance of the B-diamond MOSFETs, we are 8 currently putting more effort into improving the fabrication process and the device 9 structure. For demonstrating the performance of them at high-temperature, we have 10 investigated their electrical properties at 300 ºC. 11 Figure 1 illustrates the fabrication process for the B-diamond MOSFETs. First, 12 Ib-type (100) diamond substrates were boiled in a solution of H2SO4 + HNO3 at 300 °C 13 for 3 hours to clean the diamond surface [Fig. 1(a)]. The B-diamond epitaxial layer was 14 grown by microwave plasma-assisted chemical vapor deposition [Fig. 1(b)]. The 15 microwave power, temperature, and chamber pressure were kept at 1.4 kW, ~1000 °C, 16 and 18.6 kPa, respectively.18 The boron source was the residual boron in chamber from 17 the previous B-diamond growth. Flow rates for the source gases of H2 and CH4 were 49 18 and 1 sccm, respectively. Thickness and concentration of boron atoms for the 19 B-diamond epitaxial layer were measured by secondary ion mass spectroscopy to be 20 2650 nm and ~1016 cm–3, respectively. Acceptor concentration was deduced based on 21 the capacitance-voltage measurement to be 6.0 × 1014 cm–3. 22 The B-diamond epitaxial layer was treated in the acid solution (H2SO4 + HNO3) at 23 300 °C for 3 hours, changing its hydrogen surface to oxygen [Fig. 1(c)]. After 24 5 sequentially coating the B-diamond with a positive photoresist (LOR5A) followed by an 1 image reversal photoresist (AZ5214E) using a spin-coater, it was exposed and 2 developed using a DL-1000 scanning maskless lithography system and 3 tetramethylammonium hydroxide (TMAH) solution (concentration: 2.38%), 4 respectively. The spin speed and time for coating both photoresists were 7000 rpm and 1 5 second, respectively. The baking temperature and time for LOR5A were 180 °C and 5 6 minutes, and those for AZ5214E were 110 °C and 2 minutes, respectively. The 7 developing time in the TMAH solution was 2.0–2.5 minutes. 8 The source/drain electrodes consisting of a Ti/Au bilayer (10/150 nm) were 9 evaporated on the B-diamond by electron-gun evaporation system [Fig. 1(d)]. The 10 chamber pressure used for evaporating the Ti/Au bilayer was ~10–6 Pa, and the 11 evaporation rates for the Ti and Au were 1 and 2 Å/s, respectively. They were annealed 12 at 550 °C for 20 minutes in an Ar atmosphere to form Ohmic contacts using a rapid 13 thermal annealing system [Fig. 1(e)]. An Al2O3 gate oxide was deposited by atomic 14 layer deposition at 200 °C using Al(CH3)3 and ozone precursors [Fig. 1(f)]. The gate 15 oxide thickness was approximately 26 nm. A Ti/Au (10/200 nm) bilayer was employed 16 as the gate electrode [Fig. 1(g)]. Then, the Al2O3 film was deposited again with 17 thickness of 20 nm to cover the surface of the sample [Fig. 1(h)], unlike our previous 18 reports.13,14 This Al2O3 cover layer is helpful to eliminate the surrounding environmental 19 effect and the edge leakage of electrodes for the B-diamond MOSFETs, which would 20 enhance their reliability and device performance. 21 Windows for accessing the electrodes were opened by etching the Al2O3 film using 22 a capacitively coupled plasma reactive-ion etching system in a CHF3 + Ar atmosphere 23 [Fig. 1(i)]. The plasma power, chamber pressure, CHF3 flow rate, and Ar flow rate were 24 6 100 W, 3.0 Pa, 10 sccm, and 40 sccm, respectively. The electrical properties were 1 measured using a Grail 10-5-LV-HTV prober system at RT and 300 ºC. 2 Figures 2(a) and 2(b) shows a scanning electron microscopy image and schematic 3 diagram of the B-diamond MOSFET, respectively. The diameter for the drain electrode 4 is 299.6 μm. The gate width (WG) can be calculated as 940.7 μm. The LG is 2.6 μm. The 5 interspatial lengths for the gate-to-source and gate-to-drain electrodes are 5.8 and 4.6 6 μm, respectively. Comparing to our previous report (5.6/9.8/15.3 μm),13 all of them 7 have been shortened. This is benefit to decrease total on-resistance (RON) and to increase 8 ID,max for the B-diamond MOSFETs. 9 Figures 3(a) and 3(b) show the ID as functions of drain voltage (VD) for the 10 B-diamond MOSFETs working at RT and 300 °C, respectively. The gate-to-source 11 voltage (VGS) varies from ‒20.0 to 78.0 V in steps of +2.0 V. They show good operations 12 with p-type characteristics. The ID,max for the B-diamond MOSFET working at RT is 13 ‒1.2 mA/mm. Although the boron doping and acceptor concentrations (~1016 cm–3 and 14 6.0 × 1014 cm–3) for this B-diamond channel layer is lower than those (~1017 cm–3 and 15 2.9 × 1016 cm–3) of the previous one,13 the ID, max is more than two times higher than that 16 of the reported value of ‒0.49 mA/mm. This is possibly attributed to the decrease of the 17 LG and the interspatial lengths for the gate-to-source and gate-to-drain electrodes, 18 resulting in the reduction of the RON from 26.9 kΩ mm to 9.6 kΩ mm. At the working 19 temperature of 300 °C, the ID,max significantly increases to ‒10.9 mA/mm and the RON 20 decreases to 1.1 kΩ mm because of the activation of boron dopants at higher 21 temperature. The ID,max working at 300 °C is higher than that (~8 mA/mm) of the 22 B-diamond MOSFET working at 250 °C.12 23 Figures 4(a) and 4(b) show the ID–VGS characteristics for the B-diamond MOSFETs 24 7 working at RT and 300 °C, respectively. By linear extrapolation, threshold voltage (VTH) 1 values for the MOSFETs at RT and 300 °C are determined to be 63.8 ± 0.1 and 31.2 ± 2 0.1 V, respectively. The on/off ratios for both MOSFETs are higher than 109. They are 3 the highest comparing to the previous reports by now.10-14 The choosing of ozone 4 precursors for the deposition of Al2O3 gate film13 and the covering of metal electrodes 5 with Al2O3 layer lead to the improvement of Al2O3/B-diamond interfacial quality and 6 the suppression of electrode edge leakage. This is the possible reason for the better 7 on/off ratios of the B-diamond MOSFETs. 8 Subthreshold voltage (SS) values for the MOSFETs working at RT and 300 °C are 9 determined to be 315 and 570 mV/dec, respectively. Then, interfacial trapped charge 10 density (Dit) of the Al2O3/B-diamond can be calculated using Eq. (1).19 11 ln(10) 1 itOXqDkTSSq C = +   , (1) 12 where k, T, q, and COX are Boltzmann’s constant (8.62×10−5 eV/K), working 13 temperature, elementary charge (1.6 × 10–19 C), and oxide capacitance (0.266 μF/cm2),14 14 respectively. The Dit for the B-diamond MOSFET working at RT was calculated as 7.2 15 × 1012 eV–1 cm–2, which is better than that of the previous report value (1.1 × 1013 eV–1 16 cm–2) that for the MOSFET without the electrode cover layer.14 At working temperature 17 of 300 °C, the Dit increases to be 1.4 × 1013 eV–1 cm–2. Figures 4 (c) and 4(d) show the 18 gm-VGS characteristics for the B-diamond MOSFETs working at RT and 300 °C, and 19 their gm,max values were 29.0 and 215.7 μS/mm, respectively. 20 Table 1 summarized electrical properties of the B-diamond MOSFETs working at 21 RT, 250 °C, and 300 °C. The ID,max, RON, on/off ratio, Dit, and gm,max in this work are 22 improved comparing to the previous B-diamond MOSFETs.10-14 Although the on/off ratio 23 8 (>109) of the B-diamond-based MOSFET is better than that (106) of the 1 Si-diamond-based MOSFET at 300 °C, the ID,max (–10.9 mA/mm) and gm,max (215.7 2 μS/mm) are much lower than those of the latter of ~120 mA/mm and ~4000 μS/mm, 3 respectively. 4 There are several methods to further improve performance of the B-diamond 5 MOSFETs. One is to decrease the Ohmic contact resistance by choosing heavily 6 B-doping or ion implantation in the source/drain contact area. We can also try to improve 7 the structures of the B-diamond MOSFETs such as to further decrease the LG and the 8 interspatial lengths between source/drain and gate electrodes for reducing the RON of the 9 MOSFETs or to fabricate the triple-gate fin-type MOSFETs to enhance the carriers 10 travelling at the same device area.20 11 In this study, B-diamond MOSFETs have been fabricated and their operating 12 performance at RT and 300 °C has been investigated. The ID,max, on/off ratio, and gm,max 13 for the B-diamond MOSFET working at RT are −1.2 mA/mm, >109, and 29.0 μS/mm, 14 respectively. The B-diamond MOSFET still operates well at 300 °C with the above 15 properties of −10.9 mA/mm, >109, and 215.7 μS/mm, respectively. This study would 16 promote the development of diamond-based MOSFETs for high-temperature 17 applications. 18 19 20 21 22 23 9 This work is supported by the JSPS KAKENHI Projects (JP23K03966, 20H05661, 1 and JP20H00313), MEXT Q-LEAP (JPMXS0118068379), JST CREST (JPMJCR1773), 2 JST Moonshot R&D (JPMJMS2062), MIC R&D for construction of a global quantum 3 cryptography network (JPMI00316), and ARIM (JPMXP1223NM5006) of the Ministry 4 of Education, Culture, Sports, Science and Technology, Japan. 5 6 Data Availability Statements 7 The data that support the findings of this study are available from the corresponding 8 author upon reasonable request. 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 10 Table 1. Summary of electrical properties of the B-diamond MOSFETs working at RT, 1 250 ℃, and 300 ℃. 2 Ref. Tem. ID,max (mA/mm) RON (kΩ mm) VTH (V) On/off ratio Dit (eV–1 cm–2) gm,max (μS/mm) [10] RT –0.0019 >1000 7 ~104 - ~2 [11] RT –0.12 ~200 >20 - - - [12] RT –0.12 ~80 35 >105 - - 250 ℃ –8 ~1.7 - 5×105 - - [13] RT –0.49 26.9 63.2 - - 18.7 [14] RT –0.11 220 58.8 >108 1.1 × 1013 4.1 This work RT –1.2 9.6 63.8 >109 7.2 × 1012 29.0 300 ℃ –10.9 1.1 31.2 >109 1.4 × 1013 215.7 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 11 References 1 1. C. J. H. Wort and R. S Balmer, Mater. Today 11, 22–28 (2008). 2 2. K. Hirama, H. Sato, Y. Harada, H. Yamamoto, and M. Kasu, Jpn. J. Appl. Phys. 51, 3 090112 (2012). 4 3. H. Kawarada, T. Yamada, D. Xu, Y. Kitabayashi, M. Shibata, D. Matsumura, M. 5 Kobayashi, T. Saito, T. Kudo, M. Inaba, and A. Hiraiwa, Proc. 28th Int. Symp. Power 6 Semiconductor Devices ICs (ISPSD), Prague, Czech Republic, June 2016. 7 4. J. Liu, H. Ohsato, M. Y. Liao, M. Imura, E. Watanabe, and Y. Koide, IEEE Electron 8 Dev. Lett. 38, 922–925 (2017). 9 5. Z. Ren, J. Zhang, J. Zhang, C. Zhang, S. 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Fabrication process for B-diamond MOSFET: (a) Diamond cleaning, (b) 3 B-diamond growth, (c) acid treatment, (d) Ti/Au source/drain electrode formation, (e) 4 annealing to form Ohmic contact, (f) first time Al2O3 deposition for gate oxide, (g) 5 Ti/Au gate electrode formation, (h) second time Al2O3 deposition to cover the electrodes, 6 and (i) opening windows for the electrodes. 7 8 FIG. 2. (a) Scanning electron microscopy image and (b) schematic diagram of the 9 B-diamond MOSFET, respectively. 10 11 FIG. 3. (a) and (b) ID–VD characteristics for the B-diamond MOSFETs working at RT 12 and 300 ºC, respectively. 13 14 FIG. 4. (a) and (b) ID–VGS characteristics for the B-diamond MOSFETs working at RT 15 and 300 ºC, respectively . (c) and (d) gm-VGS characteristics for the B-diamond 16 MOSFETs working at RT and 300 ºC, respectively . 17 18 19 20 21 22 23 14 1 2 3 4 5 6 7 8 9 10 11 12 13 Liu et al., Figure 1 14 15 16 17 18 19 20 21 22 23 24 (h) Al2O3 dep. (2nd)Diamond B-diamond B-diamond(a) Sub. Clean. (b) Epitaxial (c) Acid treat.(d) Source/drain(i) Al2O3 etch.Ti/Au(f) Al2O3 dep. (1st) (e) AnnealingTi/AuAl2O3(g) Gate electrodeTi/AuAl2O315 1 2 3 4 5 6 Liu et al., Figure 2 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 (a)GateSourceDrain200 μ m Diamond (100)Source2.6 μm5.8 μm 4.6 μmDrainGateBoron-doped diamondAl2O3 Al2O3(b)16 1 2 3 4 5 6 7 Liu et al., Figure 3 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 0 -2 -4 -6 -8 -10 -12 -14 -160.0-0.2-0.4-0.6-0.8-1.0-1.2 0 -2 -4 -6 -8 -10 -12 -14 -160-2-4-6-8-10-12 I D (mA/mm)VD (V)VGS: –20.0 ~ 78.0 VStep: +2.0 V(a)I D (mA/mm)VD (V)VGS: –20.0 ~ 78.0 VStep: +2.0 V(b)17 1 2 3 4 5 6 7 8 9 10 Liu et al., Figure 4 11 12 80 60 40 20 0 -2010-1210-1010-810-610-410-2100102 80 60 40 20 0 -2010-1210-1010-810-610-410-2100102 40 35 30 25 20 15 10 5 0 -5-100102030 40 35 30 25 20 15 10 5 0 -5 -10050100150200250 I D (μA/mm)VGS (V)(a) 63.8 VOn/off: > 109SS: 315 mV/decVGS (V)I D (μA/mm)(b)31.2 VOn/off: > 109SS: 570 mV/decVGS (V)gm(μS/mm)215.7 μS/mm29.0 μS/mmVGS (V)gm(μS/mm)(c) (d)