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Lukas Renn, Lisa S. Walter, [Kenji Watanabe](https://orcid.org/0000-0003-3701-8119), [Takashi Taniguchi](https://orcid.org/0000-0002-1467-3105), R. Thomas Weitz

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[All About the Interface: Do Residual Contaminants at A High‐Quality h‐BN Monolayer Perylene Diimide Interface Cause Charge Trapping?](https://mdr.nims.go.jp/datasets/4a013ffc-9cdc-4941-8597-268e9978c635)

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All About the Interface: Do Residual Contaminants at A High‐Quality h‐BN Monolayer Perylene Diimide Interface Cause Charge Trapping?www.advmatinterfaces.de2101701  (1 of 8) © 2022 The Authors. Advanced Materials Interfaces published by Wiley-VCH GmbHResearch ArticleAll About the Interface: Do Residual Contaminants at  A High-Quality h-BN Monolayer Perylene Diimide Interface Cause Charge Trapping?Lukas Renn, Lisa S. Walter, Kenji Watanabe, Takashi Taniguchi, and R. Thomas Weitz*DOI: 10.1002/admi.2021017011. IntroductionIn the quest to characterize intrinsic charge transport processes in organic sem-iconductors, the impact of extrinsic effects such as contact resistances, nonideal mor-phology, and external contaminants must be minimized.[1–3] The semiconductor-dielectric interface is critical for charge transport since traps and surface rough-ness can hinder efficient charge trans-port.[4,5] While the surface roughness is easy to characterize, e.g., with atomic force microscopy (AFM) and its origin can thus be easily identified,[6] this is highly non-trivial for electrically active traps. Such traps are often related to the influence of the dielectric used in organic field-effect transistors (OFETs), since the dielectric constant and other intrinsic properties can impact the charge transport.[4,5,7–10] In an effort to reduce trapping (at, e.g., water and other intrinsic or extrinsic traps) at the semiconductor–dielectric interface, typi-cally the surface is passivated by the use of self-assembled monolayers (SAMs).[11] Recently also intrinsically inert hexagonal boron nitride (h-BN) has been used as a dielectric with the goal to realize a trap-free interface.[12–14]In this report, we investigate charge transport in PDI1MPCN2 (N, N´-di((S)-1-methylpentyl)-1,7(6)-dicyano-perylene-3,4:9,10-bis(dicarboximide) (see inset of Figure 1a). PDI1MPCN2 is an organic small molecule, which stands out due to good process-ability via a solution-based crystallization method as well as its excellent n-type charge-transport properties.[15] However, it was recently discovered that potentially electron–phonon scat-tering or trapping at the OSC-Al2O3 dielectric interface limits the charge-carrier transport at elevated temperatures and high charge-carrier densities.[4] One method to reduce scattering and trapping of charge carriers at the interface is to design air-gap FETs and thereby remove the OSC-dielectric interface com-pletely, which was first used by Podzorov et al. and Menard et al. for freestanding bulk single-crystal OFETs.[16,17] This approach was also realized in our group by Schaffroth et al. [18] with air-gap FETs based on a freely suspended PDI1MPCN2 thin film, which constitutes the first realization of this technique with van der Waals bound OSC films down to nanometer thickness. As a consequence, the charge-carrier trapping was reduced significantly, however, the overall mobilities of the freely sus-pended films were lower than the films in direct contact with Intrinsic charge transport in molecularly thin organic semiconducting crystals is critically sensitive to the quality of the interfaces required to perform the electrical measurements. Most prominent are the dielectric–semiconductor and semiconductor–metal interface. While impacts from the latter on charge transport can be extracted by four-terminal measurements, the impact of the dielectric interface can only be minimized, typically by utilizing inert dielec-trics. Here, it is shown that charge transport in organic field-effect transistors based on the n-type small molecule N, N′-di((S)-1-methylpentyl)-1,7(6)-dicyano-perylene-3,4:9,10-bis(dicarboximide) (PDI1MPCN2) can be improved up to one order of magnitude by using hexagonal boron nitride (h-BN) as  dielectric, compared to a standard SiO2 substrate. Using temperature-dependent electrical measurements, the charge-transport properties of devices are sys-tematically analyzed, and high four-terminal mobilities of up to 5.0 cm2 V−1 s−1 are obtained. The high mobility likely stems from decreased charge-carrier trapping at the semiconductor-dielectric interface due to the smooth sur-face of the inert h-BN. Nevertheless, the temperature dependencies of the mobility, threshold voltage, and interface-state trap density suggest that charge-carrier trapping at the dielectric-semiconductor interface still exists. By comparing the data to transport studies performed on thin air-gapped organic films, it is concluded that an interfacial layer (likely water or solvent residues) between h-BN and the monolayer PDI1MPCN2 causes charge trapping.L. Renn, L. S. Walter, R. T. Weitz1st Institute of PhysicsFaculty of PhysicsGeorg-August-UniversityGöttingen, GermanyE-mail: thomas.weitz@uni-goettingen.deL. Renn, L. S. Walter, R. T. WeitzAG Physics of NanosystemsFaculty of PhysicsLudwig-Maximilians-UniversityMunich, GermanyK. WatanabeResearch Center for Functional MaterialsNational Institute for Materials Science1-1 Namiki, Tsukuba 305-0044, JapanT. TaniguchiInternational Center for Materials NanoarchitectonicsNational Institute for Materials Science1-1 Namiki, Tsukuba 305-0044, JapanThe ORCID identification number(s) for the author(s) of this article can be found under https://doi.org/10.1002/admi.202101701.© 2022 The Authors. Advanced Materials Interfaces published by Wiley- VCH GmbH. This is an open access article under the terms of the Crea-tive Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited.Adv. Mater. Interfaces 2022, 9, 2101701http://crossmark.crossref.org/dialog/?doi=10.1002%2Fadmi.202101701&domain=pdf&date_stamp=2022-01-29www.advancedsciencenews.comwww.advmatinterfaces.de2101701  (2 of 8) © 2022 The Authors. Advanced Materials Interfaces published by Wiley-VCH GmbHa dielectric, most probably due to contact effects. Another way to improve the OSC-dielectric interface that we want to follow here is to introduce h-BN as the gate dielectric in OFETs. h-BN is a van der Waals material that consists of layers of alternating boron and nitrogen atoms arranged in a hexagonal honeycomb lattice. It has a very smooth and continuous surface relatively free of charge traps and dangling bonds. This makes h-BN a highly inert dielectric, meaning that it exerts less traps and scat-tering sites on carriers moving in the accumulation channel at the OSC-dielectric interface compared to, e.g., SiO2 dielectrics. Furthermore, it has a large bandgap that makes h-BN a prime candidate for the gate dielectric in OFET devices.[19] h-BN was previously used with great success in conjunction with gra-phene, as the highest mobilities in graphene were measured in graphene-h-BN heterostructures due to the negligible amount of defects and the atom-scale roughness of h-BN.[13,20,21] In recent years, it was reported that an improvement of charge-transport properties can also be reached in organic semicon-ductors by using h-BN as gate dielectric and thereby reducing the amount of scattering and trapping at the OSC-dielectric interface.[12–14,22] This implies that h-BN might allow to realize devices with extremely small interface-state trap density, as obtained before with suspended organic semiconductors, but now with the high mobilities seen on solid dielectrics.2. Device FabricationTo investigate the charge transport of PDI1MPCN2 on an h-BN dielectric, bottom gate bottom contact (BGBC) FETs and four-point contact devices were prepared on highly doped silicon sub-strates with a 300 nm SiO2 insulator. h-BN flakes, synthesized as described previously,[23] were exfoliated on top and etched into a rectangular shape (see Figure S1, Supporting Information) using inductively coupled plasma – reactive ion etching (Plasma Lab System 100, Oxford). Since the monolayer PDI1MPCN2 film is only ≈2 nm thin, we can assume that no charge transport occurs over the edges of the h-BN flakes, whose thicknesse between 15 and 50  nm lead to a bend in the OSC film inhib-iting charge transport.[15] Consequently, the h-BN flake defines the channel width. Due to the delicate nature of our devices on a micrometer lengthscale, it is not possible to pattern the PDI thin film exactly onto the h-BN flake, since the required lithog-raphy procedures would destroy the organic film. As a result, fringe currents around the h-BN flake might impact our elec-trical measurements as recently discussed by Pei et al.,[24] where a mobility overestimation of up to 60% in solution processed OFETs was recorded. While we cannot exclude a slight impact of fringe currents on our measurements, we think that a pos-sible mobility overestimation is not nearly as grave as described in ref. [24] due to the reasons outlined in detail in Supporting Information S2. Metal contacts were ingrained into the h-BN as shown in Figure 1 by etching the desired structures into the h-BN before the metal evaporation. Ingraining the contacts pro-vides a rather flat surface without large steps between the metal and the h-BN (Figure 1c). A large step would result in mechan-ical stress and bad alignment of the organic film and the metal, which leads to a reduced charge-carrier injection and large con-tact resistances. Keeping the interface on the same level ena-bles a smooth, highly crystalline PDI1MPCN2 thin film, which is applied via a solution-based surface-mediated crystallization process as described in ref. [15]. An atomic-force microscope (AFM) image of a complete device is shown in Figure 1b.3. Results and DiscussionTo investigate the charge transport properties of PDI1MPCN2 on h-BN, two- and four-point measurements were performed in a vacuum point-probe station (CRX-VF Probe Station, Lake-Shore Cryotronics). Annealing of the samples at 400 K for  1–2 days inside the probe station at 3 × 10−7 mbar improved the quality of the samples and is reflected by a more than doubled charge-carrier mobility (see Figure S3, Supporting Informa-tion). Transfer curves in the linear and saturation regime of an exemplary annealed sample measured at room temperature Figure 1.  Fabrication of OFET-devices with PDI1MPCN2 on an h-BN dielectric. a) Optical image after h-BN flakes are etched into rectangular shape and metal contacts are ingrained into the h-BN. Inset: structural formula of the PDI1MPCN2 molecule used in this work. b) Atomic force microscope (AFM) image of an OFET device after the PDI1MPCN2 is solution deposited. c) To reduce contact effects, the metal leads are ingrained into the h-BN.Adv. Mater. Interfaces 2022, 9, 2101701www.advancedsciencenews.comwww.advmatinterfaces.de2101701  (3 of 8) © 2022 The Authors. Advanced Materials Interfaces published by Wiley-VCH GmbHare shown in Figure 2a, b, respectively, and the corresponding output curve in Figure  2c. We observe characteristic elec-tron-transport behavior with an onset voltage slightly below Von = − 20 V as well as high On/Off-current ratios of approxi-mately Ion/Ioff  = 105 in the saturation regime. Furthermore, the device shows a small hysteresis and a threshold voltage of Vth ≈ −7 V. The charge-carrier mobility of μlin = 2.0 cm2 V−1 s−1 was extracted from the linear-regime transfer curve shown in Figure  2a. Additionally, we determined rlin  = 0.89 as the measurement-reliability factor as proposed by Choi et  al.,[25] which confirms the high quality of the devices. A slightly higher mobility of μsat= 2.2  cm2  V−1  s−1 and a corresponding reliability factor of rsat  = 0.90 was extracted from the satura-tion-regime transfer curve. The mobilities obtained from dif-ferent devices were consistently around this magnitude with a maximum value of the linear mobility at room temperature of μlin  = 2.5 cm2  V−1  s−1 and a corresponding reliability factor of rlin = 0.77 (Figure S4, Supporting Information).To analyze the impact of h-BN as a substrate on the charge-carrier transport, we also performed measurements with PDI1MPCN2 on a pure silicon substrate without the additional h-BN layer (Figure S5, Supporting Information). In Figure  2d, the mobilities from devices with and without h-BN layer are  displayed as a function of charge carrier density n, which was deter-mined from the gate voltage, the threshold voltage and the dielec-tric capacitance per unit area of the substrate as n = CDiel(VGS  − Vth)/e . The mobilities from devices with additional h-BN layer show consistently higher mobilities of approximately one order of magnitude, which indicates that the charge-carrier transport is sig-nificantly improved by using h-BN as a dielectric substrate.We further realized a full encapsulation of PDI1MPCN2 between h-BN layers by stamping a second hBN flake on top of the OFET device, which however—unlike, e.g., in graphene devices—did not result in a further improvement of the charge-carrier transport, possibly due to damaging of the organic thin film during the stamping process (Figures S6–S9, Supporting Information).To shed more light on the impact of the h-BN on the elec-tronic properties of the OSC, we performed a systematic study of the temperature dependent charge transport. The corresponding linear-regime mobilities extracted from the transfer curves displayed in Figure S10 (Supporting informa-tion) are presented in Figure  3a,b. The measurements show a freeze out of μlin at cryogenic temperatures and an almost linear increase with temperature from T = 100 K to T = 260 K, which is followed by a significant drop of μlin at temperatures above 340 K. While μlin is largely independent of the charge-carrier density below room temperature, its decrease at high temperatures appears to be more sizeable at higher charge-carrier densities. The same trends can be observed from the transfer curves detected in the saturation regime (Figure S11, Supporting Information).Additionally, we evaluated the activation energy Ea from the linear-regime mobilities following an Arrhenius approach (Figure  3c) to values between Ea  = 25 meV and Ea  = 30 meV, which are in perfect agreement with the results obtained by Vladimirov et al. [26] for the same molecule when using a SAM-modified Al2O3 dielectric.Besides the temperature dependence of μ, we also investigated the evolution of the threshold voltage Vth Figure 2.  Electrical characterization of PDI1MPCN2 thin films on h-BN at room temperature. a,b) Transfer curves and extracted parameters in the linear (a) and saturation regime (b). The VGS sweep rate is 2 V s−1. c) Corresponding output curve with VDS sweep rate of 4 V s−1. d) Comparison of the linear regime mobilities measured from a device with PDI1MPCN2 on h-BN and PDI1MPCN2 on pure SiO2.Adv. Mater. Interfaces 2022, 9, 2101701www.advancedsciencenews.comwww.advmatinterfaces.de2101701  (4 of 8) © 2022 The Authors. Advanced Materials Interfaces published by Wiley-VCH GmbHwith temperature, as well as the interface-state trap den-sity Nit, which was calculated from the subthreshold slope  S (Nit = [S*log(2.718)/(kBT/e) − 1] Cdiel/e with S = dVGS/dlog(IDS), Cdiel the capacitance per unit area of the gate dielectric, e the elementary charge and kB the Boltzmann constant).[4,27,28] Both, Vth and Nit, show a monotonous decrease with rising tempera-ture (Figure 3d,e). While the magnitude of Vth varied between different samples, the overall monotonous temperature devel-opment was the same for each sample.We further compared our values of Vth and Nit with the results obtained by some of us earlier (Vladimirov et al.[4] and Schaffroth et al.[18]) on the same OSC but using a different die-lectric and different solvent for OSC deposition, to gain a deeper understanding of the impact of the different substrates in the OFET device. Since the gate capacitances Cdiel of the dielectrics differ, it is not sensible to compare Vth directly. Rather, the gate-capacitance normalized threshold voltage was evaluated (i.e., ( ( 100 ) )= − = ∗V V V T K CthNormth th diel ), which allows us to compare the temperature development of VthNorm  between different sub-strates (see Figure  3f). VthNorm obtained from measurements with PDI1MPCN2 located on solid substrates shows a signifi-cant temperature dependence, whereas the measurements by Figure 3.  a,b) Temperature dependence of the linear-regime mobility displayed as a function of charge-carrier density (a) and temperature (b). Both plots display a mobility attenuation at elevated temperatures, which is more pronounced at high charge-carrier densities. c) Extraction of the activation energy through an Arrhenius approach. d) Temperature dependent shift of the threshold voltage Vth. e, f) Comparison of the temperature dependence of the threshold voltage (e) and interface state trap density between different substrates. The data for suspended films in (e) and (f) were taken from Schaffroth et al.[18] and measurements for the Al2O3 substrate are taken from Vladimirov et al.[4]Adv. Mater. Interfaces 2022, 9, 2101701www.advancedsciencenews.comwww.advmatinterfaces.de2101701  (5 of 8) © 2022 The Authors. Advanced Materials Interfaces published by Wiley-VCH GmbHSchaffroth et al.[18] with a suspended film display a substantially smaller effect of the temperature onto Vth, which indicates a larger presence of deep traps when using a device with a solid dielectric. This hypothesis is also supported by the interface state trap density Nit, where a lower absolute value of Nit on suspended films is observed compared to devices with a solid dielectric (Figure 3e).Taken together, the measurements of Nit, VthNorm, and μ on dif-ferent dielectrics allow to make suggestions about the under-lying phenomena responsible for the observed temperature dependencies. We first turn to the discussion of the possible cause for the decrease of μ at temperatures above 300 K, which seems to be independent of the dielectric used, i.e., h-BN or SiO2 in the present study, and—in consideration of our earlier work—Al2O3.[4] This decrease might be either related to yet unknown intrinsic effects within the OSC at such high charge carrier densities, or more likely to the dielectric–semicon-ductor interface, which is also indicated by the measurements of Schaffroth et  al. on interface-free air gap OFETs, where no decrease of μ at high temperatures was measured.[18]We believe that two possible scenarios are able to explain the observed decrease as was previously hypothesized by Vladimirov et  al. [4] In the first scenario scattering between the charge carriers and phonons in the underlying dielectric is responsible for the deterioration of the mobility. With rising temperature the number of dielectric phonons increases, thus resulting in an increased amount of scattered charge car-riers and a reduction in mobility. In the second scenario traps located directly at the OSC-dielectric interface are considered. Depending on their depth, traps can be differentiated between deep and shallow traps. Shallow traps are known to decrease the mobility, whereas deep traps generally only impact the threshold voltage, since the charge carriers are trapped perma-nently and consequently do not contribute to the charge trans-port and the mobility. [4,16,29,30] Possibly, at elevated temperatures the thermal energy is high enough to excite carriers out of the deep traps, effectively turning the deep traps into shallow traps, which leads to the observed decrease in mobility. In both sce-narios, the increased attenuation at higher charge-carrier densi-ties displayed in Figure 3a,b can be attributed to the increased gate bias pulling the charge carriers closer to the OSC-dielectric interface, which makes the charges more susceptible to both, scattering and trapping processes.Consequently, the observation of similar temperature-dependent damping of μ in our samples suggests that scat-tering or trapping at the OSC–dielectric interface is still existent when using h-BN as a dielectric. The physical origin of these traps or scattering sites—since observed on h-BN, SiO2, and Al2O3 dielectrics—might be a universal interfacial layer, poten-tially related to solvent residues or water. Recent reports state that water as well as other polar molecules at the OSC–dielec-tric interface can act as traps localizing charge carriers.[31–36] In fact, it is known that on any type of surface, several monolayers of water remain and likely are also present on the h-BN dielec-trics before and after OSC deposition. For instance, in h-BN encapsulated graphene devices interfacial contaminants had to be removed by mechanical pressing before high mobilities could be observed,[37] a process we cannot perform using OSCs due to their mechanical properties. Mobility limitations due to an interlayer could also be the reason that we do not find a dra-matic improvement in μ when changing from the Al2O3 + SAM dielectric [4,15] to an h-BN dielectric (here the 4-point mobility (Figure  4e,f) obtained from our devices in bottom-contact geometry should be compared to the top- contact geometry used by Vladimirov et al.[4] on the Al2O3 substrates).The temperature evolution of Vth and Nit also points to the presence of external effects, most likely also related to the OSC–dielectric interface. In detail, in our measurements on h-BN and SiO2, we observe a monotonous decrease of Vth and Nit (Figure 3e,f) similar to the temperature evolution of the sus-pended films.[18] Since the absolute values of VthNorm  and Nit are significantly smaller in the suspended films, the observed Vth and Nit on h-BN, SiO2, and Al2O3 dielectrics must stem from effects not related to the OSC itself. Additionally, the h-BN die-lectric is extremely inert and trap-free, and therefore unlikely the reason for the high Vthnorm  and Nit values. Consequently, we anticipate that also the deep traps dominating Vth and Nit are located at the OSC–dielectric interface. Again, trapped solvent or water might be the physical origin of these traps. Trapped solvent or water could—besides other effects discussed in ref. [4]—also explain the different temperature evolutions of Vth and Nit in the devices prepared on Al2O3, if we take into account that the OSC onto Al2O3 had been deposited from a dimethyl phthalate : toluene (DMP:Tol) mixture, while in the prior work we only used DMP.To solidify that effects related to the interface and not other external effects, such as contact resistance, are causing the discussed temperature dependencies, we have also employed four-point measurements. Figure  4a shows the total channel resistance RTotal, the contact resistance RContact, as well as the film resistance RFilm as function of the gate voltage. The contact resist-ance accounts for the resistance at both, the source and drain electrode, and is calculated as RContact = RTotal − RFilm = VDS/IDS − L/D  × V4p/IDS, where V4p is the voltage measured between the probes inside the channel, D is the edge-to-edge distance between those probes, L is the overall channel length, and VDS and IDS are the voltage and the current measured over the whole channel length between the outer contacts, respectively. [38]At low gate voltages, the overall resistance RTotal is domi-nated by RContact, since for |VGS  − Vth|  <  |VDS| the transistor is in the saturation regime and pinchoff occurs, which leads to a high resistance depletion region at the drain electrode.[2,3] As VGS increases, both RC and RFilm decrease, likely due to an increased charge-carrier density that results in an increasing semiconductor conductivity. At high gate voltages, the magni-tude of RContact is slightly below the film resistance, however, both resistances are still in the same order of magnitude, which suggests that contact effects might influence measurements in our device.We have also investigated the temperature dependence of our 4-point devices, and the resulting contact and film resist-ance are displayed in Figure 4c,d in intrinsic units as width-nor-malized contact resistance RContactW and film sheet resistance RSheet = RFilm(W/D). Both resistances show a minimum between T = 300 K and T = 360 K and increase significantly at low tem-peratures, presumably due to a freeze out of charge carriers.When comparing the relation between RContact and RFilm (see Figure 4b) at a fixed gate voltage VGS = 80 V, it can be observed Adv. Mater. Interfaces 2022, 9, 2101701www.advancedsciencenews.comwww.advmatinterfaces.de2101701  (6 of 8) © 2022 The Authors. Advanced Materials Interfaces published by Wiley-VCH GmbHthat RContact is consistently slightly smaller than RFilm at elevated temperatures, whereas at lower temperatures RContact is larger. The more significant increase with decreasing temperature suggests that the impact of contact effects on our device is larger at cryogenic temperatures, which is also supported by the detected output curves. We observe close to ideal output characteristics at room temperature, while nonlinearities and an S-swing can be noticed at low temperatures, which indicates charge-carrier injection problems in our device (Figure S12, Supporting Information).Finally, we calculated the four-point mobilities μlin, 4p  = (D/WCDiel)[d(IDS/V4p)/dVGS], which yield the contact-effect corrected mobility of our devices (see Figure  4e,f, the corresponding two-point measurements are shown in Sup-porting Information S13).[25,38] We use the edge-to-edge dis-tance D in this calculation, to avoid a mobility overestimation due to the impact of the voltage probes inside the accumula-tion channel, as recently reported by Choi et  al.[39] Using the edge-to-edge distance between the inner voltage probes repre-sents the ultimate shunting scenario described by Choi et al.[39] and makes sure that we do not risk an overestimation of μlin, 4p. Figure 4e,f displays the four-point mobilities and similar to the results shown in Figure  3a,b, we observe a density-dependent dampening of the mobility at high temperatures. However, the  Figure 4.  a) Overall channel resistance RTotal, contact resistance RC and film resistance RFilm as a function of gate voltage. b) Plot of RContact and RFilm at fixed gate voltage VGS = 80 V as a function of temperature. At cryogenic temperatures, the contact resistance is dominant, whereas at elevated temperatures RContact is slightly smaller than RFilm. c,d) Width-normalized contact resistance RContactW (c) and film sheet resistance RSheet = RFilm(W/D) (d) at various temperatures as a function of the gate voltage. e,f) Contact-resistance corrected four-point mobility as a function of the temperature (a) and charge-carrier density (b).Adv. Mater. Interfaces 2022, 9, 2101701www.advancedsciencenews.comwww.advmatinterfaces.de2101701  (7 of 8) © 2022 The Authors. Advanced Materials Interfaces published by Wiley-VCH GmbHabsolute mobility values are significantly larger by up to a factor of two, reaching mobilities as high as μlin, 4p = 5 cm2 V−1 s−1. This indicates that contact effects still impact the measurements in our device, thereby leading to a reduced mobility in two-point measurements. However, the overall temperature-dependent characteristics of the charge-carrier mobility discussed before are the same, confirming that the temperature evolution of μ, Vth, and Nit are not dominated by contact resistances.4. ConclusionWe investigated the effect of the van der Waals material h-BN on the charge transport properties of the small molecule n-type semiconductor PDI1MPCN2 by performing electrical meas-urements with the inert h-BN as dielectric and comparing them to previous measurements on samples using a conven-tional substrate, as well as devices with a freely suspended OSC film.[4,15,18] To exclude contact effects from our results, we employed four-point measurements and observed that while contact resistances influence our measurements in terms of a reduced mobility, the overall temperature-dependent evolution of μ, Vth, and Nit is not affected. Maximum linear-regime mobili-ties of μlin = 2.5 cm2 V−1  s−1 from two-point measurements and μlin, 4p = 5 cm2 V−1 s−1 from four-point measurements reveal a sig-nificant improvement of the charge-carrier transport when using h-BN as dielectric, with mobilities being one order of magnitude higher compared to devices with a SiO2 substrate. We believe that charge-transport improvement stems from decreased charge-carrier trapping at the OSC-dielectric interface, due to the smooth and continuous surface of h-BN. However, a decrease of the mobility μ at elevated temperatures and increased charge-carrier densities suggests that charge-carrier trapping in shallow traps still exists, possibly due to an interfacial layer, which is independent from the dielectric in use and related to solvent res-idues or water. This hypothesis is further reinforced by investi-gating the threshold voltage Vth as well as the interface-state trap density Nit, which are significantly higher in devices with solid dielectrics than in the interface-free suspended films,[18] indi-cating that the amount of deep traps is also related to an inter-facial layer (likely water or solvent residues) at the OSC-dielectric interface. Further investigations will be required to pinpoint the exact nature of these interfacial contaminants so that they can be removed effectively. Due to the nanoscopic amount of mate-rial present at the interface, its identification will require detailed scattering techniques, e.g., at synchrotron sources. Avoiding the contaminants will be particularly challenging since nanoscopic water layers at surfaces are—even in high vacuum environ-ments—hard to remove.[33] While we have investigated only a specific monolayer semiconductor, it is likely that such a residual water layer also limits device performance in other monolayer and multilayer OFETs and that inert dielectrics are potentially not the final solution to remove all interfacial contaminants.Supporting InformationSupporting Information is available from the Wiley Online Library or from the author.AcknowledgementsL.R., L.S.W., and R.T.W. acknowledge funding from the Center for Nanoscience (CeNS) and the SolarTechnologies go Hybrid (SolTech) initiative. The authors additionally acknowledge funding by the Deutsche Forschungsgemeinschaft (DFG, German Research Foundation) under Germany’s Excellence Strategy – “EXC 2089/1−390776260 (e-conversion)”. K.W. and T.T. acknowledge support from the Elemental Strategy Initiative conducted by the MEXT, Japan (Grant Number JPMXP0112101001) and Japan Society for the Promotion of Science KAKENHI (Grant Numbers 19H05790 and JP20H00354).Conflict of InterestThe authors declare no conflict of interest.Data Availability StatementThe data that support the findings of this study are available from the corresponding author upon reasonable request.Keywordscharge transport, field-effect transistor, interface, organic semiconductor, van-der-WaalsReceived: September 13, 2021Revised: December 14, 2021Published online: January 29, 2022[1]  M. Waldrip, O. D. Jurchescu, D. J. Gundlach, E. G. Bittle, Adv. Funct. Mater. 2019, 39, 1904576.[2]  H. Klauk, G. Schmid, W. Radlik, W. Weber, L. Zhou, C. D. Sheraw, J. A. Nichols, T. N. Jackson, Solid-State Electron. 2003, 47, 297.[3]  P. V.  Pesavento, R. J.  Chesterfield, C. R.  Newman, C. D.  Frisbie, J. Appl. Phys. 2004, 96, 7312.[4]  I.  Vladimirov, S.  Müller, R.-P.  Baumann, T.  Geßner, Z.  Molla, S.  Grigorian, A.  Köhler, H.  Bässler, U.  Pietsch, R. T.  Weitz, Adv. Funct. Mater. 2019, 29, 1807867.[5]  H. F.  Haneef, A. M.  Zeidell, O. D.  Jurchescu, J. Mater. Chem. C 2020, 8, 759.[6]  M.  Geiger, R.  Acharya, E.  Reutter, T.  Ferschke, U.  Zschieschang, J. Weis, J. Pflaum, H. Klauk, R. T. Weitz, Adv. Mater. Interfaces 2020, 7, 1902145.[7]  S. G. J.  Mathijssen, M.  Kemerink, A.  Sharma, M.  Cölle, P. A. Bobbert, R. A. J.  Janssen, D.   M. De Leeuw, Adv. Mater. 2008, 20, 975.[8]  J. Veres, S. D. Ogier, S. W. Leeming, D. C. Cupertino, S. Mohialdin Khaffaf, Adv. Funct. Mater. 2003, 13, 199.[9]  H.-I. Un, P. Cheng, T. Lei, C.-Y. Yang, J.-Y.u Wang, J. Pei, Adv. Mater. 2018, 30, 1800017.[10]  R. P. Ortiz, A. Facchetti, T. J. Marks, Chem. Rev. 2010, 110, 205.[11]  S. Casalini, C. A. Bortolotti, F. Leonardi, F. Biscarini, Chem. Soc. Rev. 2017, 46, 40.[12]  S. J.u  Kang, G.-H.  Lee, Y.-J.  Yu, Y.  Zhao, B.  Kim, K.  Watanabe, T. Taniguchi, J. Hone, P. Kim, C. Nuckolls, Adv. Funct. Mater. 2014, 24, 5157.[13]  T. H.  Lee, K.  Kim, G.  Kim, H. J.u  Park, D.  Scullion, L.  Shaw, M.-G.  Kim, X.  Gu, W.-G.  Bae, E. J. G.  Santos, Z.  Lee, H. S.  Shin, Y. Nishi, Z. Bao, Chem. Mater. 2017, 29, 2341.Adv. Mater. Interfaces 2022, 9, 2101701www.advancedsciencenews.comwww.advmatinterfaces.de2101701  (8 of 8) © 2022 The Authors. Advanced Materials Interfaces published by Wiley-VCH GmbH[14]  Y. Zhang, J. Qiao, S.i Gao, F. Hu, D. He, B. Wu, Z. Yang, B. Xu, Y. Li, Y.i Shi, W. Ji, P. Wang, X. Wang, M. Xiao, H. Xu, J.-B. Xu, X. Wang, Phys. Rev. Lett. 2016, 116, 16602.[15]  I.  Vladimirov, M.  Kellermeier, T.  Geßner, Z.  Molla, S.  Grigorian, U. Pietsch, L. S. Schaffroth, M. Kühn, F. May, R. T. Weitz, Nano Lett. 2018, 18, 9.[16]  V.  Podzorov, E.  Menard, A.  Borissov, V.  Kiryukhin, J. A.  Rogers, M. E. Gershenson, Phys. Rev. Lett. 2004, 93, 86602.[17]  E.  Menard, V.  Podzorov, S. - H.  Hur, A.  Gaur, M. E.  Gershenson, J. A. Rogers, Adv. Mater. 2004, 16, 2097.[18]  L. S.  Schaffroth, J.  Lenz, V.  Giegold, M.  Kögl, A.  Hartschuh, R. T. Weitz, Adv. Mater. 2019, 31, 1808309.[19]  A.  Laturia, M. L.  Van De Put, W. G.  Vandenberghe, npj 2D Mater. Appl. 2018, 2, p. 4106.[20]  L. Wang, I. Meric, P. Y. Huang, Q. Gao, Y. Gao, H. Tran, T. Taniguchi, K. Watanabe, L. M. Campos, D. A. Muller, J. Guo, P. Kim, J. Hone, K. L. Shepard, C. R. Dean, Science 2013, 342, 614.[21]  C. R.  Dean, A. F.  Young, I.  Meric, C.  Lee, L.  Wang, S.  Sorgenfrei, K.  Watanabe, T.  Taniguchi, P.  Kim, K. L.  Shepard, J.  Hone, Nat. Nanotechnol. 2010, 5, 722.[22]  M. Kratzer, A. Matkovic, C. Teichert, J. Phys. D: Appl. Phys. 2019, 52, 383001.[23]  T. Taniguchi, K. Watanabe, J. Cryst. Growth 2007, 303, 525.[24]  K.e Pei, M. Chen, Z. Zhou, H. Li, P. K. L. Chan, ACS Appl. Electron. Mater. 2019, 1, 379.[25]  H. H.o Choi, K. Cho, C. D. Frisbie, H. Sirringhaus, V. Podzorov, Nat. Mater. 2017, 17, 2.[26]  I. Vladimirov, M. Kühn, T. Geßner, F. May, R. T. Weitz, Sci. Rep. 2018, 8, 14868.[27]  S. M. Sze, K. K. Ng, Physics of Semiconductor Devices, 3rd ed., John Wiley & Sons, New Jersey 2007.[28]  W. L. Kalb, B. Batlogg, Phys. Rev. B 2010, 81, 523.[29]  C. Li, L. Duan, H. Li, Y. Qiu, J. Phys. Chem. C 2014, 118, 10651.[30]  C. Li, L. Duan, Y. Sun, H. Li, Y. Qiu, J. Phys. Chem. C 2012, 116, 19748.[31]  G. Zuo, M. Linares, T. Upreti, M. Kemerink, Nat. Mater. 2019, 18, 588.[32]  J.  Sworakowski, J. Phys. 1999, 29, https://doi.org/10.1590/S0103-97331999000200013.[33]  M. Kettner, M. Zhou, J. Brill, P. W. M. Blom, R. T. Weitz, ACS Appl. Mater. Interfaces 2018, 10, 35449.[34]  C. Goldmann, D. J. Gundlach, B. Batlogg, Appl. Phys. Lett. 2006, 88, 063501.[35]  K. P. Pernstich, D. Oberhoff, C. Goldmann, B. Batlogg, Appl. Phys. Lett. 2006, 89, 213509.[36]  M.  Nikolka, I.  Nasrallah, B.  Rose, M. K.  Ravva, K.  Broch, A.  Sadhanala, D.  Harkin, J.  Charmet, M.  Hurhangee, A.  Brown, S. Illig, P. Too, J. Jongman, I. Mcculloch, J.-L. Bredas, H. Sirringhaus, Nat. Mater. 2017, 16, 356.[37]  D. G. Purdie, N. M. Pugno, T. Taniguchi, K. Watanabe, A. C. Ferrari, A. Lombardo, Nat. Commun. 2018, 9, 5387.[38]  V.  Podzorov, S. E.  Sysoev, E.  Loginova, V. M.  Pudalov, M. E. Gershenson, Appl. Phys. Lett. 2003, 83, 3504.[39]  H. H.o  Choi, Y. I.  Rodionov, A. F.  Paterson, J.  Panidi, D.  Saranin, N.  Kharlamov, S. I.  Didenko, T. D.  Anthopoulos, K.  Cho, V. Podzorov, Adv. Funct. Mater. 2018, 28, 1707105.Adv. Mater. Interfaces 2022, 9, 2101701https://doi.org/10.1590/S0103-97331999000200013https://doi.org/10.1590/S0103-97331999000200013