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[Takayoshi Oshima](https://orcid.org/0000-0001-8550-9735)

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[Step-and-terrace surface formation on (001) <i>β</i>-Ga<sub>2</sub>O<sub>3</sub> by wet etching using 2.38 wt% tetramethylammonium hydroxide (TMAH) lithographic developer](https://mdr.nims.go.jp/datasets/c44a120e-3acf-478f-ac7f-9111ad46bdce)

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Step-and-terrace surface formation on (001) β-Ga2O3 by wet etching using 2.38 wt% tetramethylammonium hydroxide (TMAH) lithographic developerStep-and-terrace surface formation on (001) β-Ga2O3 by wet etching using2.38wt% tetramethylammonium hydroxide (TMAH) lithographic developerTakayoshi Oshima1*1Research Center for Electronic and Optical Materials, National Institute for Materials Science, Tsukuba, Ibaraki 305-0044, Japan*E-mail: OSHIMA.Takayoshi@nims.go.jpReceived July 2, 2025; accepted July 22, 2025; published online August 6, 2025Wet etching of (001) β-Ga2O3 was performed using a standard lithographic developer—an aqueous solution of 2.38 wt% tetramethylammoniumhydroxide (TMAH)—at moderate temperatures of 25 °C and 40 °C. At both temperatures, the chemically-mechanically polished surfaces, whichconsisted of terraces with numerous pits and, in some samples, one- to two-monolayer-high islands, were gradually smoothed through a layer-by-layer etching process. This resulted in a well-defined step-and-terrace surface morphology characterized by pit-free, atomically flat terraces andmonolayer steps (~0.56 nm). These findings indicate that developer-based etching offers a simple yet highly effective approach for preparing (001)β-Ga2O3 surfaces for subsequent epitaxial growth or device fabrication. © 2025 The Author(s). Published on behalf of The Japan Society ofApplied Physics by IOP Publishing Ltdβ-Ga2O3 is widely recognized as a promising wide-bandgapsemiconductor for power electronic applications. Its highBaliga’s figure of merit, approximately 8MV cm−1, exceedsthose of 4H-SiC and GaN, enabling the development of low-loss, high-voltage power devices.1) In addition, the feasibilityof melt growth facilitates the production of high-quality,large-area wafers.2,3) Notably, (001)-oriented wafers andcarrier-density-controlled epitaxial wafers with diameters upto 4 inches are commercially available from Novel CrystalTechnology, Inc. These (001) epitaxial wafers have enabledprogress in vertical device demonstrations, includingSchottky barrier diodes (SBDs), metal-oxide-semiconductorfield-effect transistors (MOSFETs), and NiO/β-Ga2O3 het-erojunction PN diodes (HJ-PNDs) with kV-class operation,highlighting the material’s practical potential for next-gen-eration power electronics.4,5)Although the (001) orientation is currently a widely usedplatform for vertical device applications, atomic-level surfacesmoothing of (001) surfaces has not yet been investigated.Commercially available (001) wafers, including epitaxialwafers, are typically subjected to chemical-mechanical pol-ishing (CMP), followed by a sequential cleaning process inthe following order: organic solvent cleaning with ultrasoni-cation, hydrofluoric acid (HF) cleaning, sulfuric acid-hy-drogen peroxide mixture (SPM) cleaning, and a second roundof organic solvent cleaning with ultrasonication. Eachcleaning step was followed by rinsing in deionized (DI)water. Figures 1(a), 2(a), and 3(a) show the surface topo-graphies of the as-received (001) substrates (chips separatedfrom wafers), measured using blue-laser-driven tapping-mode atomic force microscopy (AFM; Jupiter XR, OxfordInstruments). The surface morphologies varied among in-dividual samples. Some of the topmost surfaces consisted ofsteps and terraces with numerous pits [Fig. 1(a)], while othersexhibited one- to two-monolayer-high islands on the pittedterraces [Figs. 2(a) and 3(a)]. This non-uniformity may haveoriginated from slight variations in the CMP, HF, and/orSPM cleaning steps described above. Considering bothhomoepitaxy and heteroepitaxy, as well as device applica-tions, it is desirable for the surface morphology to beuniformly composed of ordered step-and-terrace structureswithout pits. Therefore, in this study, we investigated twoapproaches-thermal annealing and wet etching-to achievesuch surface morphology.For binary metal oxide substrates, such as sapphire, TiO2,and MgO, thermal annealing is commonly employed toobtain atomically flat, stepped surfaces.6–8) In the case ofβ-Ga2O3, previous studies have reported annealed surfacemorphologies on (100), (010), and (2̄01) orientedsubstrates.4,9–11) Clearly defined step-and-terrace morpholo-gies were observed only on the (100) substrates after thermalannealing at 1000 °C–1100 °C.9,10) In contrast, annealing of(010) and (2̄01) substrates at temperatures ranging from600 °C to 1150 °C resulted in narrow, line-shaped surfacestructures extending along the [001] and [010] directions,respectively, indicating the predominant formation of (100)facets.4,11)The emergence of (100) facets during annealing was alsoobserved on the (001) plane. To evaluate the effectiveness ofthermal annealing in surface smoothing, a (001) β-Ga2O3substrate was annealed using a custom-built tube furnace. Aschematic of the annealing setup is shown in Fig. 4(a). Thesubstrate was mounted on a rotating holder inside a hor-izontal quartz tube, and annealing was conducted at 800 °C,900 °C, and 1000 °C under an N2 flow of 2.00 slm atatmospheric pressure. These annealing treatments weresequentially applied to the same substrate to monitor pro-gressive changes in surface morphology. Figure 1 presentsthe surface morphologies and the corresponding root-mean-square (RMS) roughness values before and after annealing.The initial step-and-terrace-like surface with many pits[Fig. 1(a)] was gradually transformed into line-shapedstructures with narrow terraces (~50 nm) aligned along the[010] direction as the annealing temperature increased[Figs. 1(b)–1(d)], likely due to the formation of (100) facets.As a result of the surface transformation, the RMS roughnessslightly increased from 0.17 nm (as-received) to 0.20 nm (at1000 °C). These results suggest that to achieve a pronouncedstep-and-terrace morphology with wider terraces, other sur-face smoothing techniques should be explored.In this context, we focused on wet etching, which iscommonly employed in β-Ga2O3 processing to reduceContent from this work may be used under the terms of the Creative Commons Attribution 4.0 license. Any further distribution of thiswork must maintain attribution to the author(s) and the title of the work, journal citation and DOI.088001-1© 2025 The Author(s). Published on behalf ofThe Japan Society of Applied Physics by IOP Publishing LtdJapanese Journal of Applied Physics 64, 088001 (2025) BRIEF NOTEhttps://doi.org/10.35848/1347-4065/adf380https://crossmark.crossref.org/dialog/?doi=10.35848/1347-4065/adf380&domain=pdf&date_stamp=2025-08-06https://orcid.org/0000-0001-8550-9735https://orcid.org/0000-0001-8550-9735mailto:OSHIMA.Takayoshi@nims.go.jphttps://creativecommons.org/licenses/by/4.0/https://doi.org/10.35848/1347-4065/adf380surface roughness and mitigate plasma-induced damagecaused by dry etching. Among various etchants investi-gated—such as HCl, H3PO4, HF, and tetramethylammo-nium hydroxide (TMAH)—TMAH appears to be the mosteffective.12–17) H. K. Lee et al. reported that treatment withTMAH (25 wt%, 90 °C) effectively reduced the surfaceroughness of (001) substrates induced by Cl2/BCl3 induc-tively coupled plasma reactive ion etching (ICP-RIE),whereas treatment with SPM (H2SO4:H2O2 = 1:1, 90 °C)was less effective.12) X. Lu et al. also confirmed theimprovement of Cl2/BCl3-RIE-induced surface roughnessby TMAH treatment.13) F. Zhang et al. evaluated theperformance of trench SBDs on (001) epitaxial wafersthat were post-treated with O2 plasma, HF (49 wt%), orTMAH (25 wt%, 90 °C) after Cl2/BCl3 ICP-RIE.14) Amongthese treatments, the TMAH-treated devices exhibited thehighest breakdown voltages (VB), confirming the super-iority of TMAH etching. A. R. Gutierrez et al. conductedX-ray photoelectron spectroscopy on (001) epitaxial sub-strates after BCl3 ICP-RIE followed by post-treatmentswith diluted HCl (H2O:HCl [37 wt%]= 10:1), H3PO4(85 wt%), or TMAH (10 wt%, 70 °C).15) B 1s peaks attrib-uted to BCl3 were still detected on the HCl- andH3PO4-treated surfaces but were absent on the TMAH-treated surface, indicating that TMAH effectively removedthe damaged layer. Furthermore, they compared VB valuesof SBDs and HJ-PNDs fabricated on ICP-RIE-processed(001) epitaxial substrates and found that the devicestreated with TMAH exhibited the highest VB. TMAHetching was also employed to remove dry etch-induceddamage in the fabrication of recessed-gate and slanted-fin-channel lateral MOSFETs, although the details were notdiscussed.16,17) These findings collectively suggest thatTMAH is the most promising wet etchant for (001)β-Ga2O3.Accordingly, we selected TMAH as the most suitable wetetchant for modifying the surfaces of CMP-treated (001)substrates. However, the aforementioned etching conditionsreported in previous studies (10–25 wt%, 70 °C–90 °C) arerelatively aggressive when the goal is to remove only a fewirregular monolayers. To address this issue, we conductedetching experiments using a standard lithographic developercontaining 2.38 wt% TMAH at moderate temperatures(25 °C–40 °C). This mild, developer-based etching approachis both safer and more straightforward than the previouslyreported TMAH etching methods.The as-received (001) β-Ga2O3 substrates were wet etchedusing a surfactant-free lithographic developer-an aqueoussolution of 2.38 wt% TMAH (AZ 300 MIF Developer,Merck Performance Materials GmbH). The wet etching setupis illustrated in Fig. 4(b). The etchant was maintained ateither 25 °C (commonly referred to as room temperature) or40 °C in a polytetrafluoroethylene (PTFE) beaker placed on ahot plate stirrer. The temperature was monitored and con-trolled using a PTFE-coated thermocouple immersed in thesolution. To ensure uniform temperature distribution, theetchant was continuously stirred at 300 rpm with a PTFE-coated magnetic stir bar. The etching process was initiated byimmersing the sample in the etchant and terminated bywithdrawing it from the solution, followed by rinsing in DIwater. After wet etching, the surface morphology wascharacterized by AFM. Etching and AFM observation wererepeated on the same samples using fresh etchants until thecumulative etching times reached 8 h at 25 °C and 1 h at 40 °C. It should be noted that these process temperatures werewell below the boiling point of the 2.38 wt% TMAH solution(a) (b) (c)(d)Fig. 1. (a)–(d) AFM images of a (001) β-Ga2O3 substrate showing the transformation of surface morphology before and after thermal annealing in a N2 flowunder the atmospheric pressure, at temperatures ranging from 800 °C to 1000 °C. The asterisk symbol of “*” denotes the reciprocal lattice vector.088001-2© 2025 The Author(s). Published on behalf ofThe Japan Society of Applied Physics by IOP Publishing LtdJpn. J. Appl. Phys. 64, 088001 (2025) T. Oshima(100 °C), and thus evaporation was negligible under theexperimental conditions.Room-temperature developer etching successfully pro-duced distinct step-and-terrace structures. Figures 2(a)–2(g)show AFM topography images and corresponding RMSroughness values before and after the etching process. Theinitial surface consisted of steps and pitted terraces with one-to two-monolayer-high islands [Fig. 2(a)]. Within the first10 min of etching, the pits expanded while the islandsdecreased in size [Fig. 2(b)]. As etching progressed to acumulative time of 30 min, most of the pitted terraces wereremoved but still remained as small islands near the stepedges on the underlying terraces, indicating a shift in thedominant terrace level [Fig. 2(c)]. The newly exposed mainterraces also contained small pits. With continued etching upto a cumulative time of 4 h, these pits expanded preferentiallyalong the b-axis and extended to the step edges, resulting inthe step edges being segmented into fine b-axis-elongatedstructures [Figs. 2(d)–2(f)]. This behavior indicates in-planeanisotropy in the step etch rate, with the (010) step etchingfaster than the (100) step. Upon further etching, most of thefine step-edge structures were removed, and a well-defined,pit-free step-and-terrace morphology was observed at acumulative etching time of 8 h [Fig. 2(g)]. Importantly, nonew pits were observed after the initial pit removal, sug-gesting that the etching proceeded in a layer-by-layer modethroughout the entire etching process. The correspondingRMS roughness decreased from 0.48 nm (as-received) to0.22 nm (after 8 h), consistent with the observed surfaceevolution.The observed step height indeed corresponded to themonolayer thickness of the (001) plane. Figure 2(g′) showsthe AFM image obtained by planar leveling of Fig. 2(g),using a terrace region as the reference surface. A heightprofile was extracted along the arrowed line crossing a step,as shown in Fig. 2(g″). The height difference between theterraces was measured to be approximately 0.56 nm. Thisvalue matches the interplanar spacing of (001) cleavage(a) (b) (c)(d) (e) (f)(g) (g’) (g’’)Fig. 2. (a)–(g) and (g′) AFM images of a (001) β-Ga2O3 substrate showing the evolution of surface morphology before and after wet etching in 2.38 wt%TMAH at 25 °C, with cumulative etching times ranging from 10 min to 8 h. The topography data in (g) and (g′) are identical but were leveled using differentmethods: whole-area flattening for (g) and terrace-by-terrace flattening for (g′). (g″) Height profile along the arrow line in (g′).088001-3© 2025 The Author(s). Published on behalf ofThe Japan Society of Applied Physics by IOP Publishing LtdJpn. J. Appl. Phys. 64, 088001 (2025) T. Oshimaplanes,18,19) given by c sin β= 0.5630 nm, calculated usingthe lattice parameters of β-Ga2O3.20) Similar measurements atother steps confirmed that all steps were one-monolayer highand exhibited no step bunching.Developer etching at 40 °C also produced a well-resolvedstep-and-terrace surface morphology similar to that obtainedat 25 °C, but in a significantly shorter time. This process wasalso accompanied by the removal of islands, a shift in themain terrace level, expansion of pits, and smoothing of stepedges, as shown in Figs. 3(a)–3(d). Accordingly, the RMSroughness decreased from 0.36 nm (as-received) to 0.19 nm(after 1 h). The etched surface morphology at 40 °C for 1 hclosely resembled that at 25 °C for 8 h. Additionally, theresulting step height was equal to the monolayer thickness ofthe (001) plane, as shown in Figs. 3(d′) and 3(d″). Despiteonly a 15 °C increase in temperature, the surface treatmenteffect was significantly enhanced. Further increases intemperature may accelerate the surface smoothing; however,they would also cause excessive evaporation of the etchant,leading to a higher TMAH concentration and increased safetyrisks. Therefore, we refrained from conducting experimentsat higher temperatures.In conclusion, we have proposed a facile surfacepreparation technique using a standard lithographic devel-oper to achieve a pit-free, step-and-terrace surface mor-phology on (001) β-Ga2O3 substrates—an outcome not(a) (b) (c)(d) (d’) (d’’)Fig. 3. (a)–(d) and (d′) AFM images of a (001) β-Ga2O3 substrate showing the evolution of surface morphology before and after wet etching in 2.38 wt%TMAH at 40 °C, with cumulative etching times ranging from 10 min to 1 h. The topography data in (d) and (d′) are identical but were leveled using differentmethods: whole-area flattening for (d) and terrace-by-terrace flattening for (d′). (d″) Height profile along the arrow line in (d′).(a) (b)Fig. 4. Schematic illustrations of (a) the thermal annealing and (b) wet etching setups. TC and MFC refer to the thermocouples and mass flow controllers,respectively.088001-4© 2025 The Author(s). Published on behalf ofThe Japan Society of Applied Physics by IOP Publishing LtdJpn. J. Appl. Phys. 64, 088001 (2025) T. Oshimaattainable through conventional thermal annealing.Although the required etching durations are relativelylong, the process can be conducted at low temperatures,including room temperature, which is of considerablepractical significance for process implementation. In parti-cular, developer-based etching at room temperature re-quires no heating equipment other than ambient airconditioning. Furthermore, owing to the ambient-tempera-ture condition and extremely slow etching rate, no stirringsystem is necessary. The process can also be carried out ina sealed container, thereby improving operational safety.In addition, the technique is compatible with batchprocessing of large-diameter wafers and epitaxial wafers.Given these advantages, the developer-based etchingmethod holds strong potential as a simple and effectivepretreatment step for subsequent epitaxial growth or devicefabrication.All experiments were conducted using reagents andequipment in the Nanofabrication Microscopy Unit at theNational Institute for Materials Science (NIMS), under theframework of the Advanced Research Infrastructure forMaterials and Nanotechnology (ARIM), supported by theMinistry of Education, Culture, Sports, Science andTechnology (MEXT), Japan (No. JPMXP1225NM5079).This work was financially supported by a Grant-in-Aid forScientific Research (B) from the Japan Society for thePromotion of Science (JSPS), MEXT, Japan (No.JP24K01368).ORCID iDs Takayoshi Oshima https://orcid.org/0000-0001-8550-97351) M. Higashiwaki, K. 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Published on behalf ofThe Japan Society of Applied Physics by IOP Publishing LtdJpn. J. Appl. Phys. 64, 088001 (2025) T. Oshimahttps://orcid.org/0000-0001-8550-9735https://orcid.org/0000-0001-8550-9735https://orcid.org/0000-0001-8550-9735https://doi.org/10.1063/1.3674287https://doi.org/10.1002/crat.202400255https://doi.org/10.1002/crat.202400255https://doi.org/10.1140/epjs/s11734-025-01486-2https://doi.org/10.35848/1882-0786/ad6b73https://doi.org/10.1002/aelm.202300844https://doi.org/10.1002/aelm.202300844https://doi.org/10.1063/1.114313https://doi.org/10.1063/1.114313https://doi.org/10.1143/JJAP.44.L511https://doi.org/10.1016/j.susc.2006.11.066https://doi.org/10.1016/j.susc.2006.11.066https://doi.org/10.1016/j.apsusc.2008.02.184https://doi.org/10.1016/j.apsusc.2008.02.184https://doi.org/10.1143/APEX.1.011202https://doi.org/10.1143/APEX.1.011202https://doi.org/10.1016/j.apsusc.2021.151651https://doi.org/10.1016/j.apsusc.2021.151651https://doi.org/10.1016/j.apsusc.2019.144673https://doi.org/10.1016/j.apsusc.2022.153587https://doi.org/10.1016/j.apsusc.2024.161569https://doi.org/10.1116/6.0004289https://doi.org/10.1109/TED.2022.3154340https://doi.org/10.1063/5.0119694https://doi.org/10.1016/j.chemphys.2005.08.051https://doi.org/10.1063/5.0019915https://doi.org/10.1063/5.0019915https://doi.org/10.1107/S0108270195016404https://doi.org/10.1107/S0108270195016404 A1