Silicon–van der Waals heterointegration for CMOS-compatible logic-in-memory design

Article

Creator

Mu-Pai Lee ; Caifang Gao ; Meng-Yu Tsai ; Che-Yi Lin ; Feng-Shou Yang ; Hsin-Ya Sung ; Chi Zhang ; Wenwu Li ; Jun Li ; Jianhua Zhang ; Kenji Watanabe ; Takashi Taniguchi ; Keiji Ueno ; Kazuhito Tsukagoshi ; Ching-Hwa Ho ; Junhao Chu ; Po-Wen Chiu ; Mengjiao Li ; Wen-Wei Wu ; Yen-Fu Lin

Keyword

van der Waals, 2D/3D heterointegration

Date published

2023-12-08

Updated at

2025-02-10 16:30:24 +0900