# Electrospun Stacked Dual‐Channel Transistors with High Electron Mobility Using a Planar Heterojunction Architecture

https://mdr.nims.go.jp/datasets/e08106c4-9865-47d1-a930-7c0fe1a96a07

## File

- [Adv Elect Materials - 2022 - He - Electrospun Stacked Dual‐Channel Transistors with High Electron Mobility Using a Planar (1).pdf](https://mdr.nims.go.jp/filesets/fd681f68-0145-4cd1-a725-33ccdd8b55ce/download) ([Detail](https://mdr.nims.go.jp/filesets/fd681f68-0145-4cd1-a725-33ccdd8b55ce.md))

## Id

e08106c4-9865-47d1-a930-7c0fe1a96a07

## Local identifier



## Visibility

open_to_public

## State

published

## Created at

2023-10-04T03:03:03.118691Z

## Updated at

2024-01-05T13:13:45.529473Z

## Published at

2023-10-05T04:30:13.758290Z

## Doi



## First published url

https://doi.org/10.1002/aelm.202201007

## Date published

2022-12-07

## Recorded date published

2023-2

## Resource type

journal_article

## Manuscript type

vor

## Collection



## Title

- title: Electrospun Stacked Dual‐Channel Transistors with High Electron Mobility
    Using a Planar Heterojunction Architecture
  title_type: original
  lang: en

## Description

- description: By far, despite the progress, there are no related reports on the construction
    of oxide heterojunction (HJ) based on electrospinning. Thus, developing electrospinning
    strategy to implement oxide-based heterojunction TFTs will help overcoming important
    bottlenecks associated with the level of performance and manufacturing of TFT
    technologies. Herein, the first realization of electrospinning-derived stacked
    dual-channel (DC) HJ TFTs composed of alternating layers of In<sub>2</sub>O<sub>3</sub>
    and ZnO has been reported. By carefully designing the TFT channel architecture
    and varying the stacking density in both nanofibers, significant enhancement in
    both the electron mobility and TFT stress stability have been demonstrated. Meanwhile,
    our findings further elucidate the significant advance of electrospinning-derived
    double channel heterojunction transistors toward practical applications for future
    low-cost and high-performance electronics.
  description_type: abstract
  lang: eng

## Creator

- name: Bo He
  role: author
- name: Gang He
  role: author
- name: Shanshan Jiang
  role: author
- name: Jiangwei Liu
  role: author
  orcid: https://orcid.org/0000-0003-2580-7401
  organization: National Institute for Materials Science
  ror: https://ror.org/026v1ze26
- name: Elvira Fortunato
  role: author
- name: Rodrigo Martins
  role: author

## Contact agent



## Publisher

organization: Wiley

## Managing organization



## Keyword

- subject: Transistors
  schema: not_defined
- subject: Dual-Channel
  schema: not_defined

## Rights

- identifier: https://creativecommons.org/licenses/by/4.0/

## Other identifier(s)



## Data origin

- data_origin_type: other

## Embargo



## Journal

- title: Advanced Electronic Materials
  issn: 2199160X
  volume: '9'
  issue: '2'
  article_number: '2201007'

## Conference



## Related item



## Funding



## Instrument



## Instrument operator



## Instrument managing organization



## Measurement method



## Specimen



## Chemical composition



## Structure for specimen



## Structural feature for specimen



## Specific property for specimen



## Process for specimen treatment



## Computational method



## Energy level/transition state



## Software



## Custom property



## Fileset

- id: fd681f68-0145-4cd1-a725-33ccdd8b55ce
  filename: Adv Elect Materials - 2022 - He - Electrospun Stacked Dual‐Channel Transistors
    with High Electron Mobility Using a Planar (1).pdf
  content_type: application/pdf
  size: 2487155
  md5: 6de95e5c22539867e61b7f1f1ebf5420

## Thumbnail

fileset_id: fd681f68-0145-4cd1-a725-33ccdd8b55ce
filename: Adv Elect Materials - 2022 - He - Electrospun Stacked Dual‐Channel Transistors
  with High Electron Mobility Using a Planar (1).pdf