@misc{yimeng2024a,
  title = {Van der Waals polarity-engineered 3D integration of 2D complementary logic},
  author = {Yimeng Guo, Jiangxu Li, Xuepeng Zhan, Chunwen Wang, Min Li, Biao Zhang, Zirui Wang, Yueyang Liu, Kaining Yang, Hai Wang, Wanying Li, Pingfan Gu, Zhaoping Luo, Yingjia Liu, Peitao Liu, Bo Chen, Kenji Watanabe, Takashi Taniguchi, Xing-Qiu Chen, Chengbing Qin, Jiezhi Chen, Dongming Sun, Jing Zhang, Runsheng Wang, Jianpeng Liu, Yu Ye, Xiuyan Li, Yanglong Hou, Wu Zhou, Hanwen Wang, Zheng Han},
  publisher = {Springer Science and Business Media LLC},
  year = {2024-06-13},
  keywords = {Polarity Engineering of 2D Semiconductors, Vertically Integrated Logic Circuits, van der Waals Interfacial Coupling}
}