# Dielectric-Stack-Engineered Anti-Ambipolar Transistors for Low-Voltage Ternary Logic

https://mdr.nims.go.jp/datasets/4954bda7-6e9f-4b78-9324-5f915f1e2466

## File

- [Dielectric-Stack-Engineered_Anti-Ambipolar_Transistors_for_Low-Voltage_Ternary_Logic.pdf](https://mdr.nims.go.jp/filesets/5390674d-a1c8-4b54-ba0d-b4fafd54b1a4/download) ([Detail](https://mdr.nims.go.jp/filesets/5390674d-a1c8-4b54-ba0d-b4fafd54b1a4.md))

## Id

4954bda7-6e9f-4b78-9324-5f915f1e2466

## Local identifier



## Visibility

open_to_public

## State

published

## Created at

2026-11-04T09:36:05.356069Z

## Updated at

2026-11-04T09:41:23.252356Z

## Published at

2026-11-05T01:27:33.908976Z

## Doi



## First published url

https://doi.org/10.1109/jeds.2026.3737142

## Date published

2026-10-06

## Recorded date published

2026

## Resource type

journal_article

## Manuscript type

vor

## Collection



## Title

- title: Dielectric-Stack-Engineered Anti-Ambipolar Transistors for Low-Voltage Ternary
    Logic
  title_type: original
  lang: en

## Description

- description: We demonstrate an ultralow-voltage ternary multivalued logic (MVL)
    inverter based on an extended p-channel antiambipolar transistor (Ep-AAT) employing
    an optimized HfO2/polystyrene gate dielectric stack. The HfO2 dielectric enables
    low-voltage operation, while the polystyrene surface layer provides a low-surface-energy
    interface for stable organic channel formation. The Ep-AAT exhibits an intrinsic
    N-shaped transfer characteristic with a clear negative transconductance region,
    explained by the combined contributions of the N1, P1, and P2 channels. Integrated
    with an n-type transistor, the Ep-AAT realizes a ternary MVL inverter with three
    distinct logic states at a supply voltage of 2 V without additional circuit complexity.
    These results highlight the potential of HfO2/polystyrene-based Ep-AATs for MVL
    circuits.
  description_type: abstract
  lang: und

## Creator

- name: Juhyung Seo
  role: author
  orcid: https://orcid.org/0000-0003-4396-9439
- name: Jihyun Shin
  role: author
- name: Ulrike Kraft
  role: author
- name: Hocheon Yoo
  role: author
  orcid: https://orcid.org/0000-0003-0772-3327
- name: Ryoma Hayakawa
  role: author
  orcid: https://orcid.org/0000-0002-1442-8230
- name: Yutaka Wakayama
  role: author
  orcid: https://orcid.org/0000-0002-0801-8884

## Contact agent



## Publisher

organization: Institute of Electrical and Electronics Engineers (IEEE)

## Managing organization



## Keyword

- subject: Anti-ambipolar transistor
  schema: not_defined
- subject: Negative transconductance
  schema: not_defined
- subject: Ternary multi-valued logic
  schema: not_defined
- subject: Ultralowvoltage inverter
  schema: not_defined
- subject: High-k gate dielectric
  schema: not_defined

## Rights

- identifier: https://creativecommons.org/licenses/by/4.0/

## Other identifier(s)



## Data origin



## Embargo



## Journal

- title: IEEE Journal of the Electron Devices Society
  issn: '21686734'
  volume: '14'
  start_page: 875
  end_page: 880

## Conference



## Related item



## Funding

- funder_name: National Research Foundation of Korea
- identifier: RS-2024-00438999
  funder_name: Korean Government [Ministry of Science and ICT (MSIT)]
- funder_name: Korea Basic Science Institute
- identifier: RS-2025-00558813
  funder_name: Korean Government
- identifier: 23H00269
  funder_name: Japan Society for the Promotion of Science (JSPS) KAKENHI
- funder_name: Canon Foundation
- funder_name: Electronics and Telecommunications Research Institute
- identifier: 4011-2026-00002
  funder_name: Korean Government, Neuromorphic Computing, Synaptic Device, Neuron
    Device, Activation function, Vertical Stacking
- identifier: KOITA-2026-017
  funder_name: Korea Industrial Technology Association
- identifier: JPJ004596
  funder_name: Innovative Science and Technology Initiative for Security, Acquisition,
    Technology and Logistics Agency

## Instrument



## Instrument operator



## Instrument managing organization



## Measurement method



## Specimen



## Chemical composition



## Structure for specimen



## Structural feature for specimen



## Specific property for specimen



## Process for specimen treatment



## Computational method



## Energy level/transition state



## Software



## Custom property



## Fileset

- id: 5390674d-a1c8-4b54-ba0d-b4fafd54b1a4
  filename: Dielectric-Stack-Engineered_Anti-Ambipolar_Transistors_for_Low-Voltage_Ternary_Logic.pdf
  content_type: application/pdf
  size: 2514324
  md5: 7611112f2ebabc78f1b6d45871cda27f

## Thumbnail

fileset_id: 5390674d-a1c8-4b54-ba0d-b4fafd54b1a4
filename: Dielectric-Stack-Engineered_Anti-Ambipolar_Transistors_for_Low-Voltage_Ternary_Logic.pdf